Product details

Number of input channels 1 Resolution (Bits) 15 Sample rate (Max) (MSPS) 4000 Features Decimating Filter, Differential Inputs, Out of Range Indicator, Power Down, Ultra High Speed Analog input BW (MHz) 3300 SFDR (Typ) (dB) 70.1 SNR (Typ) (dB) 59.9 Power consumption (Typ) (mW) 2000 Logic voltage DV/DD (Max) (V) 1.26 Logic voltage DV/DD (Min) (V) 1.14 Analog voltage AVDD (Max) (V) 1.995 Analog voltage AVDD (Min) (V) 1.805 Operating temperature range (C) -40 to 85
Number of input channels 1 Resolution (Bits) 15 Sample rate (Max) (MSPS) 4000 Features Decimating Filter, Differential Inputs, Out of Range Indicator, Power Down, Ultra High Speed Analog input BW (MHz) 3300 SFDR (Typ) (dB) 70.1 SNR (Typ) (dB) 59.9 Power consumption (Typ) (mW) 2000 Logic voltage DV/DD (Max) (V) 1.26 Logic voltage DV/DD (Min) (V) 1.14 Analog voltage AVDD (Max) (V) 1.995 Analog voltage AVDD (Min) (V) 1.805 Operating temperature range (C) -40 to 85
VQFNP (NKE) 68 100 mm² 10 x 10
  • Excellent Noise and Linearity up to and beyond FIN = 3 GHz
  • Configurable DDC
  • Decimation Factors from 4 to 32 (Complex Baseband Out)
  • Usable Output Bandwidth of 800 MHz at
    4x Decimation and 4000 MSPS
  • Usable Output Bandwidth of 100 MHz at
    32x Decimation and 4000 MSPS
  • Low Pin-Count JESD204B Subclass 1 Interface
  • Automatically Optimized Output Lane Count
  • Embedded Low Latency Signal Range Indication
  • Low Power Consumption
  • Key Specifications:
    • Max Sampling Rate: 4000 MSPS
    • Min Sampling Rate: 1000 MSPS
    • DDC Output Word Size: 15-Bit Complex (30 bits total)
    • IMD3: −64 dBc (FIN = 2140 MHz ± 30 MHz at −13 dBFS)
    • FPBW (–3 dB): 3.2 GHz
    • Supply Voltages: 1.9 V and 1.2 V
    • Power Consumption
      • Decimate by 10 (4000 MSPS): 2 W
      • Power Down Mode: <50 mW
  • Excellent Noise and Linearity up to and beyond FIN = 3 GHz
  • Configurable DDC
  • Decimation Factors from 4 to 32 (Complex Baseband Out)
  • Usable Output Bandwidth of 800 MHz at
    4x Decimation and 4000 MSPS
  • Usable Output Bandwidth of 100 MHz at
    32x Decimation and 4000 MSPS
  • Low Pin-Count JESD204B Subclass 1 Interface
  • Automatically Optimized Output Lane Count
  • Embedded Low Latency Signal Range Indication
  • Low Power Consumption
  • Key Specifications:
    • Max Sampling Rate: 4000 MSPS
    • Min Sampling Rate: 1000 MSPS
    • DDC Output Word Size: 15-Bit Complex (30 bits total)
    • IMD3: −64 dBc (FIN = 2140 MHz ± 30 MHz at −13 dBFS)
    • FPBW (–3 dB): 3.2 GHz
    • Supply Voltages: 1.9 V and 1.2 V
    • Power Consumption
      • Decimate by 10 (4000 MSPS): 2 W
      • Power Down Mode: <50 mW

The LM15851 device is a wideband sampling and digital tuning device. Texas Instruments’ giga-sample analog-to-digital converter (ADC) technology enables a large block of frequency spectrum to be sampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the serial interface.

The LM15851 device is available in a 68-pin VQFN package. The device operates over the Industrial (–40°C ≤ TA ≤ 85°C) ambient temperature range.

The LM15851 device is a wideband sampling and digital tuning device. Texas Instruments’ giga-sample analog-to-digital converter (ADC) technology enables a large block of frequency spectrum to be sampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the serial interface.

The LM15851 device is available in a 68-pin VQFN package. The device operates over the Industrial (–40°C ≤ TA ≤ 85°C) ambient temperature range.

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Technical documentation

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Type Title Date
* Data sheet LM15851 Ultra-Wideband RF Sampling Subsystem datasheet (Rev. E) 19 Oct 2017
Technical article Why should you care about the noise immunity of MLVDS drivers and receivers? 26 Jul 2017
Technical article How to minimize filter loss when you drive an ADC 20 Oct 2016
Technical article RF sampling: analog-to-digital converter linearity sets sensitivity 29 Sep 2016
Technical article RF sampling: linearity performance is not so straightforward 30 Aug 2016
Application note System solution for avionics & defense 23 Sep 2015
White paper Ready to make the jump to JESD204B? White Paper (Rev. B) 19 Mar 2015
User guide LM15851EVM User's Guide (Rev. A) 05 Aug 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LM15851EVM — LM15851 12-Bit, 4.0-GSPS, RF-Sampling Wideband Receiver Evaluation Module

The LM15851EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ LM15851. The LM15851 is a wideband sampling and digital tuning device with a buffered analog input, integrated Digital Down Converter with programmable NCO and Decimation settings and features a (...)

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Support software

DATACONVERTERPRO-SW — High-speed data converter pro software

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
Simulation model

ADC12J4000 IBIS-AMI Model (Rev. A)

SLAM198A.ZIP (4134 KB) - IBIS-AMI Model
Simulation model

LM15851 IBIS Model (Rev. A)

SLAM222A.ZIP (24 KB) - IBIS Model
Package Pins Download
VQFN (NKE) 68 View options

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