GUI for evaluation module (EVM)
ADS58C28SPIGUI-SW — ADS42xxx SPI GUI
ADS58C28SPIGUI-SW is the installation package for ADS58C28_ADS42xx_GUI which is used to access or write internal registers of ADS58C28 through an on-board USB port.
Data sheet
ADS58C28
- Maximum Sample Rate: 200MSPS
- High Dynamic Performance:
- 83dBc SFDR at 140MHz
- 72.5dBFS SNR with 60MHz BW Using SNRBoost3G Technology
- SNRBoost3G Highlights:
- Supports Wide Bandwidth (up to 60MHz)
- Programmable Bandwidths:
20MHz, 30MHz, and 40MHz - Flat Noise Floor within the Band
- Independent SNRBoost3G Coefficients for Both Channels
- Output Interface:
- Double Data Rate (DDR) LVDS with Programmable Swing and Strength:
- Standard Swing: 350mV
- Low Swing: 200mV
- Default Strength: 100Ω termination
- 2× Strength: 50Ω termination
- Compatible with GC6016
- 1.8V Parallel CMOS Interface Also Supported
- Double Data Rate (DDR) LVDS with Programmable Swing and Strength:
- Ultralow Power with Single 1.8V Supply:
- 470mW Total Power
- 710mW Total Power (200MSPS) with SNRBoost3G on Both Channels
- Programmable Gain up to 6dB for
SNR/SFDR Trade-off - DC Offset Correction
- Supports Low Input Clock Amplitude
- Package: QFN-64 (9mm × 9mm)
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The ADS58C28 is a dual-channel, 11-bit analog-to-digital converter (ADC) with sampling rates up to 200MSPS. The device uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. This architecture makes it well-suited for multi-carrier, wide bandwidth communications applications.
The ADS58C28 uses third-generation SNRBoost3G technology to overcome SNR limitation as a result of quantization noise (for bandwidths less than Nyquist, fS/2). Enhancements in the SNRBoost3G technology allow support for SNR improvements over wide bandwidths (up to 60MHz). In addition, separate SNRBoost3G coefficients can also be programmed for each channel.
The device has a digital gain function that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset. The digital outputs of all channels are output as double data rate (DDR) low-voltage differential signaling (LVDS) together with an LVDS clock output. The low data rate of this interface (400MBPS at 200MSPS sample rate) makes it possible to use low-cost field-programmable gate array (FPGA)-based receivers. The strength of the LVDS output buffers can be increased to support 50Ω differential termination. This increase allows the output clock signal to be connected to two separate receiver chips with an effective 50Ω termination (such as the two clock ports of the GC5330). The same digital output pins can also be configured as a parallel 1.8V CMOS interface.
The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS58C28 is specified over the industrial temperature range (–40°C to +85°C).
Technical documentation
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Evaluation board
ADS58C28EVM — ADS58C28 Dual-Channel, 11-Bit, 200-MSPS Analog-to-Digital Converter Evaluation Module
The ADS58C28EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' ADS58C28 device, a dual channel 11-bit 200 MSPS analog to digital converter featuring TI's SNRBoost technology. The ADC EVM features a DDR LVDS data output which is compatible with TI's (...)
User guide: PDF
GUI for evaluation module (EVM)
DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
Supported products & hardware
Support software
SBAC120 — TIGAR Support Files
Supported products & hardware
Calculation tool
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Supported products & hardware
Calculation tool
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
Supported products & hardware
Design tool
SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)
Supported products & hardware
Simulation tool
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |
Ordering & quality
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Support & training
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