ADS62P49

Package | Pins | Size

VQFN (RGC)

81 mm² 9 x 9

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Features

Maximum Sample Rate: 250 MSPS
14-Bit Resolution – ADS62P49/ADS62P48
12-Bit Resolution – ADS62P29/ADS62P28
Total Power: 1.25 W at 250 MSPS
Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
Programmable Gain up to 6dB for SNR/SFDR Trade-Off
DC Offset Correction
90dB Cross-Talk
Supports Input Clock Amplitude Down to 400 mV_PP Differential
Internal and External Reference Support
64-QFN Package (9 mm × 9 mm)

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The ADS62Px9/x8 is a family of dual channel 14-bit and 12-bit A/D converters with sampling rates up to 250 MSPS. It combines high dynamic performance and low power consumption in a compact 64 QFN package. This makes it well-suited for multi-carrier, wide band-width communications applications.

The ADS62Px9/x8 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available.

It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to 85°C).

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Data Capture/Pattern Generator: Data Converter Evaluation Module With 8 LVDS Lanes up to 1.0Gbps

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Technical documentation

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	Type	Title	Date
*	Datasheet	Dual Channel 14-/12-Bit, 250/210 MSPS ADC with DDR LVDS & Parallel CMOS Outputs datasheet (Rev. B)	Jan. 04, 2011
	Technical articles	Keys to quick success using high-speed data converters	Oct. 13, 2020
	Technical articles	How to achieve fast frequency hopping	Mar. 03, 2019
	Technical articles	RF sampling: Learning more about latency	Feb. 09, 2017
	Technical articles	Why phase noise matters in RF sampling converters	Nov. 28, 2016
	User guide	TSW4200 Demonstration Kit User's Guide (Rev. C)	Oct. 31, 2012
	User guide	Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide)	Jul. 10, 2012
	Application note	Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)	Sep. 10, 2010
	Application note	Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio	Apr. 28, 2009
	User guide	ADS62PxxEVM Quick Start Guide (Rev C Board) (Rev. A)	Apr. 02, 2009
	User guide	ADS62PXX EVM User's Guide for EVM Rev. C (Rev. A)	Feb. 23, 2009
	Application note	CDCE62005 as Clock Solution for High-Speed ADCs	Sep. 04, 2008
	Application note	CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters	Jun. 08, 2008
	Application note	Phase Noise Performance and Jitter Cleaning Ability of CDCE72010	Jun. 02, 2008
	Application note	QFN Layout Guidelines	Jul. 28, 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download

TSW1405EVM

document-generic

User guide

Description

The TSW1405EVM is a low cost data capture circuit board used to evaluate some of Texas Instrumentsâ (TI) most popular high speed analog-to-digital converters (ADC).

The TSW1405EVM supports a high speed LVDS bus capable of providing 16-bit samples at 1.0 GSPS. The platform supports a 64k sample depth (...)

Features

Simple 16-bit waveform capture from many of TIâs high speed ADC EVMâs

Supports 64k sample depth at up to 1.0 GSPS LVDS I/O rates

LatticeECP3 high speed mini FPGA

Analyzes up to 8 channels concurrently

Single mini USB cable for power and data

Utilizes an intuitive/easy-to-use GUI package

Industryâs (...)

Abaco Systems® FMC108 FPGA mezzanine card

EVALUATION BOARD Download

Provided by Abaco Systems

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Description

The FMC108 is an eight-channel ADC FMC (FPGA mezzanine card) which is fully compliant with the VITA 57.1-2010 standard. The FMC108 is based on the TI ADS62P49 dual channel 12-Bit 250 MSPS ADC, which can be sampled by an internal clock source (optionally locked to an external reference) or an (...)

Abaco Systems® FMC104 FPGA mezzanine card

Software development

PLUG-IN Download

Provided by Abaco Systems — The FMC104 is a four-channel ADC FMC (FPGA mezzanine card) which is fully compliant with the VITA 57.1-2010 standard. The FMC104 is based on the TI ADS62P49 dual channel 14-Bit 250 MSPS ADC, which can be sampled by an internal clock source (optionally locked to an external reference) or an (...)

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Abaco Systems® FMC150 FPGA mezzanine card

PLUG-IN Download

Provided by Abaco Systems — The FMC150 is a dual channel A/D and dual channel D/A FMC daughter card. The card is based on TI's ADS62P49 dual channel 14-bit 250 Msps ADC and TI's DAC3283 dual channel 16-bit 800 Msps device. The FMC150 daughter card is mechanically and electrically compliant to FMC standard (ANSI/VITA 57.1). The (...)

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High Speed ADC SPI Programming Tool

SOFTWARE PROGRAMMING TOOL Download

HSADC-SPI-UTILITY

High-speed data converter pro software

SUPPORT SOFTWARE Download

DATACONVERTERPRO-SW — This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)

Features

Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
Works with all TI high-speed DAC, ADC, and AFE products
Provides time-domain and frequency-domain analysis
Supports single-tone, multi-tone, and modulated (...)

ADS62P28-9, ADS62P48-9 TINA-TI Transient Spice Model

Design tools & simulation

SIMULATION MODEL Download

SBAM005.TSM (14 KB) - TINA-TI Spice Model

ADS62P28-9, ADS62P48-9 TINA-TI Transient Reference Design

SIMULATION MODEL Download

SBAM006.TSC (106 KB) - TINA-TI Reference Design

ADS61xx, ADS62Pxx HS IBIS Model (Rev. B)

SIMULATION MODEL Download

SLWC088B.ZIP (653 KB) - IBIS Model

PSpice® for TI design and simulation tool

SIMULATION TOOL Download

PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)

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Features

Leverages Cadence PSpice Technology
Preinstalled library with a suite of digital models to enable worst-case timing analysis
Dynamic updates ensure you have access to most current device models
Optimized for simulation speed without loss of accuracy
Supports simultaneous analysis of multiple products
(...)

Analog-to-digital converter (ADC) harmonic calculator

CALCULATION TOOL Download

ADC-HARMONIC-CALC —

The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

Jitter and SNR Calculator for ADCs

CALCULATION TOOL Download

JITTER-SNR-CALC — JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.