Dual-Channel, 14-Bit, 250-MSPS Analog-to-Digital Converter (ADC)


Product details


Sample rate (Max) (MSPS) 250 Resolution (Bits) 14 Number of input channels 2 Analog input BW (MHz) 700 Features High Performance Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 1250 Architecture Pipeline SNR (dB) 73.4 ENOB (Bits) 11.3 SFDR (dB) 98 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RGC) 64 81 mm² 9 x 9 open-in-new Find other High-speed ADCs (>10MSPS)


  • Maximum Sample Rate: 250 MSPS
  • 14-Bit Resolution – ADS62P49/ADS62P48
  • 12-Bit Resolution – ADS62P29/ADS62P28
  • Total Power: 1.25 W at 250 MSPS
  • Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
  • Programmable Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • 90dB Cross-Talk
  • Supports Input Clock Amplitude Down to 400 mVPP Differential
  • Internal and External Reference Support
  • 64-QFN Package (9 mm × 9 mm)

open-in-new Find other High-speed ADCs (>10MSPS)


The ADS62Px9/x8 is a family of dual channel 14-bit and 12-bit A/D converters with sampling rates up to 250 MSPS. It combines high dynamic performance and low power consumption in a compact 64 QFN package. This makes it well-suited for multi-carrier, wide band-width communications applications.

The ADS62Px9/x8 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available.

It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to 85°C).

open-in-new Find other High-speed ADCs (>10MSPS)

Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The TSW1405EVM is a low cost data capture circuit board used to evaluate some of Texas Instruments’ (TI) most popular high speed analog-to-digital converters (ADC).


The TSW1405EVM supports a high speed LVDS bus capable of providing 16-bit samples at 1.0 GSPS. The platform supports a 64k sample depth (...)

  • Simple 16-bit waveform capture from many of TI’s high speed ADC EVM’s
  • Supports 64k sample depth at up to 1.0 GSPS LVDS I/O rates
  • LatticeECP3 high speed mini FPGA
  • Analyzes up to 8 channels concurrently
  • Single mini USB cable for power and data
  • Utilizes an intuitive/easy-to-use GUI package
  • Industry’s (...)
    Abaco Systems® FMC108 FPGA mezzanine card
    Provided by Abaco Systems
    The FMC108 is an eight-channel ADC FMC (FPGA mezzanine card) which is fully compliant with the VITA 57.1-2010 standard. The FMC108 is based on the TI ADS62P49 dual channel 12-Bit 250 MSPS ADC, which can be sampled by an internal clock source (optionally locked to an external reference) or an (...)

    Software development

    PLUG-INS Download
    Abaco Systems® FMC104 FPGA mezzanine card
    Provided by Abaco Systems — The FMC104 is a four-channel ADC FMC (FPGA mezzanine card) which is fully compliant with the VITA 57.1-2010 standard. The FMC104 is based on the TI ADS62P49 dual channel 14-Bit 250 MSPS ADC, which can be sampled by an internal clock source (optionally locked to an external reference) or an (...)
    PLUG-INS Download
    Abaco Systems® FMC150 FPGA mezzanine card
    Provided by Abaco Systems — The FMC150 is a dual channel A/D and dual channel D/A FMC daughter card. The card is based on TI's ADS62P49 dual channel 14-bit 250 Msps ADC and TI's DAC3283 dual channel 16-bit 800 Msps device. The FMC150 daughter card is mechanically and electrically compliant to FMC standard (ANSI/VITA 57.1). The (...)
    High-speed data converter pro software
    DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
    • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
    • Works with all TI high-speed DAC, ADC, and AFE products
    • Provides time-domain and frequency-domain analysis
    • Supports single-tone, multi-tone, and modulated (...)
    SBAC120.ZIP (262219 KB)

    Design tools & simulation

    SBAM005.TSM (14 KB) - TINA-TI Spice Model
    SBAM006.TSC (106 KB) - TINA-TI Reference Design
    SLWC088B.ZIP (653 KB) - IBIS Model
    Analog-to-digital converter (ADC) harmonic calculator

      The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

      Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

    Jitter and SNR Calculator for ADCs
    JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
    DESIGN TOOLS Download
    SBAC119B.ZIP (3547 KB)
    PCB LAYOUTS Download
    SLWR039.ZIP (3979 KB)
    SCHEMATICS Download
    SLAR064.ZIP (1580 KB)

    CAD/CAE symbols

    Package Pins Download
    VQFN (RGC) 64 View options

    Ordering & quality

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