DAC5687

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Dual-Channel, 16-Bit, 500-MSPS, 1x-8x Interpolating Digital-to-Analog Converter (DAC)

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Product details

Parameters

Resolution (Bits) 16 Number of DAC channels (#) 2 Interface type Parallel CMOS Sample/update rate (MSPS) 500 Features High Performance Rating Catalog Interpolation 1x, 2x, 4x, 8x Power consumption (Typ) (mW) 1410 SFDR (dB) 78 Architecture Current Sink Operating temperature range (C) -40 to 85 Reference type Int open-in-new Find other High-speed DACs (>10MSPS)

Package | Pins | Size

HTQFP (PZP) 100 256 mm² 16 x 16 open-in-new Find other High-speed DACs (>10MSPS)

Features

  • 500 MSPS
  • Selectable 2×-8× Interpolation
  • On-Chip PLL/VCO Clock Multiplier
  • Full IQ Compensation Including Offset, Gain, and Phase
  • Flexible Input Options:
    • FIFO With Latch on External or Internal Clock
    • Even/Odd Multiplexed Input
    • Single Port Demultiplexed Input
  • Complex Mixer With 32-Bit NCO
  • Fixed Frequency Mixer With fS/4 and fS/2
  • 1.8-V or 3.3-V I/O Voltage
  • On-Chip 1.2-V Reference
  • Differential Scalable Output: 2 mA to 20 mA
  • Pin Compatible to DAC5686
  • High Performance
    • 81-dBc ACLR WCDMA TM1 at 30.72 MHz
    • 72-dBc ACLR WCDMA TM1 at 153.6 MHz
  • Package: 100-Pin HTQFP
  • APPLICATIONS
    • Cellular Base Transceiver Station Transmit Channel
      • CDMA: W-CDMA, CDMA2000, TD-SCDMA
      • TDMA: GSM, IS-136, EDGE/UWC-136
      • OFDM: 802.16
    • Cable Modem Termination System

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open-in-new Find other High-speed DACs (>10MSPS)

Description

The DAC5687 is a dual-channel 16-bit high-speed digital-to-analog converter (DAC) with integrated 2×, 4×, and 8× interpolation filters, a complex numerically controlled oscillator (NCO), onboard clock multiplier, IQ compensation, and on-chip voltage reference. The DAC5687 is pin-compatible to the DAC5686, requiring only changes in register settings for most applications, and offers additional features and superior linearity, noise, crosstalk, and PLL phase noise performance.

The DAC5687 has six signal processing blocks: two interpolate-by-two digital filters, a fine frequency mixer with 32-bit NCO, a quadrature modulation compensation block, another interpolate-by-two digital filter, and a coarse frequency mixer with fS/2 or fS/4. The different modes of operation enable or bypass the signal processing blocks.

The coarse and fine mixers can be combined to span a wider range of frequencies with fine resolution. The DAC5687 allows both complex or real output. Combining the frequency upconversion and complex output produces a Hilbert transform pair that is output from the two DACs. An external RF quadrature modulator then performs the final single-sideband upconversion.

The IQ compensation feature allows optimization of phase, gain, and offset to maximize sideband rejection and minimize LO feedthrough for an analog quadrature modulator.

The DAC5687 includes several input options: single-port interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease the input timing ambiguity when the DAC5687 is clocked at the DAC output sample rate.

open-in-new Find other High-speed DACs (>10MSPS)
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Technical documentation

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Type Title Date
* Data sheet 16-Bit 500 MSPS 2x-8x Interpolating Dual-Channel DAC datasheet (Rev. E) Sep. 20, 2006
Technical article Keys to quick success using high-speed data converters Oct. 13, 2020
Application note Q3 2009 Issue Analog Applications Journal Sep. 24, 2018
Technical article Digital signal processing in RF sampling DACs – part 2 Apr. 04, 2017
Technical article Digital signal processing in RF sampling DACs - part 1 Feb. 13, 2017
Technical article Why phase noise matters in RF sampling converters Nov. 28, 2016
User guide DAC5687 EVM User's Guide (Rev. C) Aug. 08, 2013
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) Oct. 23, 2012
Application note Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs Jul. 14, 2009
Application note Passive Terminations for Current Output DACs Nov. 10, 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
User guide TSW3003 Demonstration Kit (Rev. D) Aug. 28, 2007
More literature TSW3003: RF Transmit Signal Chain Demonstration Kit Bulletin Sep. 28, 2006
More literature TSW3000: DAC5687 and TRF3701/02 16-Bit, 500 MSPS DAC Coupled with Direct IQ Modu Sep. 14, 2005
Application note DAC5686/DAC5687 Clock Generation Using PLL & External Clock Modes (Rev. A) Jul. 21, 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
499
Description

The DAC5688EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x/8x interpolation filters, on-board clock multiplier and PLL, 32-bit NCO and (...)

Features
  • Comprehensive test capability for DAC5688
  • Direct connection to TSW3100 signal generator EVM
  • Has a programmable Low Jitter Clock Synthesizer capable of working with a VCXO or an external clock source
  • Clock synchronization with TSW3100 for signal integrity
  • Software support with a fully featured GUI for (...)

Software development

SUPPORT SOFTWARE Download
High-speed data converter pro software
DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
Features
  • Compatible with TSW1400, TSW1405, TSW1406, TSW14J10, TSW14J50, TSW14J56, TSW14J57 and TSW14J58 pattern-generation and data-capture platforms
  • Works with all TI high-speed DAC, ADC, and AFE products
  • Provides time-domain and frequency-domain analysis
  • Supports single-tone, multi-tone, and modulated (...)

Design tools & simulation

SIMULATION MODEL Download
SLWC062C.ZIP (62 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
CALCULATION TOOL Download
DAC5687 Component Calculator
DAC5687CALC DAC5687CALC calculates appropriate external component values for the DAC5687 given a set of system parameters while highlighting intermediate calculations.
CALCULATION TOOL Download
SLWC084.ZIP (50 KB)

CAD/CAE symbols

Package Pins Download
HTQFP (PZP) 100 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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