Top

Product details

Parameters

Sample rate (Max) (MSPS) 40 Resolution (Bits) 16 Number of input channels 1 Interface type Parallel CMOS, Parallel LVDS Analog input BW (MHz) 250 Features High Performance Rating Catalog Input range (Vp-p) 3.6 Power consumption (Typ) (mW) 674 Architecture Pipeline SNR (dB) 84.3 ENOB (Bits) 13.5 SFDR (dB) 90 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RGZ) 48 49 mm² 7.0 x 7.0 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • 16-Bit Resolution
  • Maximum Sample Rate:
    • ADS5562: 80 MSPS
    • ADS5560: 40 MSPS
  • Total Power:
    • 865 mW at 80 MSPS
    • 674 mW at 40 MSPS
  • No Missing Codes
  • High SNR: 84 dBFS (3 MHz IF)
  • SFDR: 85 dBc (3 MHz IF)
  • Low-Frequency Noise Suppression Mode
  • Programmable Fine Gain, 1-dB steps Until
    6-dB Maximum Gain
  • Double Data-Rate (DDR) LVDS and Parallel
    CMOS Output Options
  • Internal and External Reference Support
  • 3.3-V Analog and Digital Supply
  • Pin-for-Pin With ADS5547 Family
  • 48-VQFN Package (7.00 mm × 7.00 mm)
open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS556x is a high-performance 16-bit family of ADCs with sampling rates up to 80 MSPS. The device supports very-high SNR for input frequencies in the first Nyquist zone. The device includes a low-frequency noise suppression mode that improves the noise from DC to about 1 MHz.

In addition to high performance, the device offers several flexible features such as output interface (either Double Data Rate [DDR] LVDS or parallel CMOS) and fine gain in 1-dB steps until 6-dB maximum gain.

Innovative techniques, such as DDR LVDS and an internal reference that does not require external decoupling capacitors, have been used to achieve significant savings in pin count. This innovation results in a compact 7-mm × 7-mm 48-pin VQFN package.

The device can be put in an external reference mode, where the VCM pin behaves as the external reference input. For applications where power is important, the ADS556x device offers power down modes and automatic power scaling at lower sample rates.

The device is specified over the industrial temperature range of –40°C to 85°C.

open-in-new Find other High-speed ADCs (>10MSPS)
Download

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 16
Type Title Date
* Datasheet ADS556x 16-Bit, 40 and 80 MSPS ADCs With DDR LVDS and CMOS Outputs datasheet (Rev. B) Jan. 13, 2016
Technical article Keys to quick success using high-speed data converters Oct. 13, 2020
Technical article How to achieve fast frequency hopping Mar. 03, 2019
Technical article RF sampling: Learning more about latency Feb. 09, 2017
Technical article Why phase noise matters in RF sampling converters Nov. 28, 2016
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) May 22, 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) Jul. 19, 2013
More literature TI and Altera Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
More literature TI and Xilinx Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
User guide ADS61x9/55xxEVM User's Guide (Rev B of the EVM board) (Rev. A) Jun. 11, 2009
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
User guide ADS5560/62EVM Dec. 04, 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
Application note QFN Layout Guidelines Jul. 28, 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
299
Description

The ADS5560EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS5560 device, a low power 16-bit 80 MSPS analog to digital converter with high SNR performance. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)

Features
  • Transformer coupled analog input path
  • Amplifier path based on the THS4509
  • Configurable CMOS or DDR LVDS parallel output modes
  • Transformer coupled clock input path
  • CDCE72010 Jitter Clock Synchronizer and Jitter Cleaner clocking circuit
  • DDR LVDS output and capture ability via TSW1400EVM or (...)
EVALUATION BOARD Download
document-generic User guide
99
Description

The TSW1405EVM is a low cost data capture circuit board used to evaluate some of Texas Instruments’ (TI) most popular high speed analog-to-digital converters (ADC).

 

The TSW1405EVM supports a high speed LVDS bus capable of providing 16-bit samples at 1.0 GSPS. The platform supports a 64k sample depth (...)

Features
  • Simple 16-bit waveform capture from many of TI’s high speed ADC EVM’s
  • Supports 64k sample depth at up to 1.0 GSPS LVDS I/O rates
  • LatticeECP3 high speed mini FPGA
  • Analyzes up to 8 channels concurrently
  • Single mini USB cable for power and data
  • Utilizes an intuitive/easy-to-use GUI package
  • Industry’s (...)
  • Software development

    SOFTWARE PROGRAMMING TOOL Download
    SUPPORT SOFTWARE Download
    High-speed data converter pro software
    DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
    Features
    • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
    • Works with all TI high-speed DAC, ADC, and AFE products
    • Provides time-domain and frequency-domain analysis
    • Supports single-tone, multi-tone, and modulated (...)

    Design tools & simulation

    SIMULATION MODEL Download
    SLWM003.ZIP (92 KB) - IBIS Model
    SIMULATION TOOL Download
    PSpice® for TI design and simulation tool
    PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
    Features
    • Leverages Cadence PSpice Technology
    • Preinstalled library with a suite of digital models to enable worst-case timing analysis
    • Dynamic updates ensure you have access to most current device models
    • Optimized for simulation speed without loss of accuracy
    • Supports simultaneous analysis of multiple products
    • (...)
    CALCULATION TOOL Download
    Jitter and SNR Calculator for ADCs
    JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

    CAD/CAE symbols

    Package Pins Download
    VQFN (RGZ) 48 View options

    Ordering & quality

    Information included:
    • RoHS
    • REACH
    • Device marking
    • Lead finish/Ball material
    • MSL rating/Peak reflow
    • MTBF/FIT estimates
    • Material content
    • Qualification summary
    • Ongoing reliability monitoring

    Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

    Support & training

    TI E2E™ forums with technical support from TI engineers

    Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

    If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

    Videos