ADS4146

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14-Bit, 160-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 160 Resolution (Bits) 14 Number of input channels 1 Analog input BW (MHz) 800 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 200 Architecture Pipeline SNR (dB) 72.2 ENOB (Bits) 11.5 SFDR (dB) 88 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RGZ) 48 49 mm² 7 x 7 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Maximum Sample Rate: 250MSPS
  • Ultralow Power with 1.8V Single Supply:
    • 201mW Total Power at 160MSPS
    • 265mW Total Power at 250MSPS
  • High Dynamic Performance:
    • SNR: 70.6dBFS at 170MHz
    • SFDR: 84dBc at 170MHz
  • Dynamic Power Scaling with Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350mV
      • Low Swing: 200mV
      • Default Strength: 100Ω Termination
      • 2x Strength: 50Ω Termination
    • 1.8V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down To 200mVPP
  • Package: QFN-48 (7mm × 7mm)

PowerPAD is a trademark of Texas Instruments Incorporated.
All other trademarks are the property of their respective owners.

open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS412x/4x are a family of 12-bit/14-bit analog-to-digital converters (ADCs) with sampling rates up to 250MSPS. These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. The devices are well-suited for multi-carrier, wide bandwidth communications applications.

The ADS412x/4x have fine gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. They include a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

The ADS412x/4x are available in a compact QFN-48 package and are specified over the industrial temperature range (–40°C to +85°C)

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

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Type Title Date
* Datasheet 12-/14-Bit, 160/250MSPS, Ultralow-Power ADC datasheet (Rev. G) Jan. 20, 2011
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Technical articles How to minimize filter loss when you drive an ADC Oct. 20, 2016
Application notes Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) May 22, 2015
Application notes Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) Jul. 19, 2013
User guides Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) Jul. 10, 2012
User guides ADS41xx/58B18EVM User's Guide.. (Rev. C) May 15, 2012
Application notes Band-Pass Filter Design Techniques for High-Speed ADCs Feb. 27, 2012
Application notes High-Speed, Analog-to-Digital Converter Basics Jan. 11, 2012
Application notes Power Supply Design for the ADS41xx (Rev. A) Dec. 29, 2011
More literature TI and Altera Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
More literature TI and Xilinx Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
Application notes Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application notes Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application notes CDCE62005 as Clock Solution for High-Speed ADCs Sep. 04, 2008
Application notes CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application notes Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
Application notes QFN Layout Guidelines Jul. 28, 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The ADS4146EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4146 device, an extremely low power 14-bit 160 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible (...)

Features
  • Transformer coupled analog input path
  • Amplifier path based on the THS4509
  • Configurable CMOS or DDR LVDS parallel output modes
  • Transformer coupled clock input path
  • CDCE72010 Jitter Clock Synchronizer and Jitter Cleaner clocking circuit
  • DDR LVDS output and capture ability via TSW1405EVM capture card
  • USB (...)
  • EVALUATION BOARDS Download
    document-generic User guide
    Description

    The ADS4149EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4149 device, an extremely low power 14-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible (...)

    Features
    • Transformer coupled analog input path
    • Amplifier path based on the THS4509
    • Configurable CMOS or DDR LVDS parallel output modes
    • Transformer coupled clock input path
    • CDCE72010 Jitter Clock Synchronizer and Jitter Cleaner clocking circuit
    • DDR LVDS output and capture ability via TSW1400EVM or TSW1405EVM (...)
    EVALUATION BOARDS Download
    document-generic User guide
    $99.00
    Description

    The TSW1405EVM is a low cost data capture circuit board used to evaluate some of Texas Instruments’ (TI) most popular high speed analog-to-digital converters (ADC).

     

    The TSW1405EVM supports a high speed LVDS bus capable of providing 16-bit samples at 1.0 GSPS. The platform supports a 64k sample depth (...)

    Features
  • Simple 16-bit waveform capture from many of TI’s high speed ADC EVM’s
  • Supports 64k sample depth at up to 1.0 GSPS LVDS I/O rates
  • LatticeECP3 high speed mini FPGA
  • Analyzes up to 8 channels concurrently
  • Single mini USB cable for power and data
  • Utilizes an intuitive/easy-to-use GUI package
  • Industry’s (...)
  • GUIS FOR EVALUATION MODULES (EVM) Download
    SLAC384B.ZIP (82933 KB)

    Software development

    SUPPORT SOFTWARE Download
    High-speed data converter pro software
    DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
    Features
    • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
    • Works with all TI high-speed DAC, ADC, and AFE products
    • Provides time-domain and frequency-domain analysis
    • Supports single-tone, multi-tone, and modulated (...)
    SUPPORT SOFTWARE Download
    SBAC120.ZIP (262219 KB)

    Design tools & simulation

    SIMULATION MODELS Download
    SBAM091.ZIP (318 KB) - IBIS Model
    SIMULATION MODELS Download
    SBAM091A.ZIP (318 KB) - IBIS Model
    CALCULATION TOOLS Download
    Analog-to-digital converter (ADC) harmonic calculator
    ADC-HARMONIC-CALC

      The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

      Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

    CALCULATION TOOLS Download
    Jitter and SNR Calculator for ADCs
    JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
    DESIGN TOOLS Download
    SBAC119B.ZIP (3547 KB)
    BILL OF MATERIALS (BOM) Download
    SLAR048.ZIP (2222 KB)

    CAD/CAE symbols

    Package Pins Download
    VQFN (RGZ) 48 View options

    Ordering & quality

    Support & training

    TI E2E™ forums with technical support from TI engineers

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