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|*||Data sheet||ADS42LBx9 14- and 16-Bit, 250-MSPS, Analog-to-Digital Converters datasheet (Rev. F)||02 May 2016|
|Application note||Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-Domai||02 May 2016|
|Application note||Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)||22 May 2015|
|Application note||Signal Chain Noise Figure Analysis||29 Oct 2014|
|User guide||ADS42LBx9EVM User’s Guide (Rev. A)||19 Jun 2014|
|Application note||Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)||19 Jul 2013|
|Application note||LMK04828 as a Clock Source for the ADS42JB69||14 Nov 2012|
|User guide||Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide)||10 Jul 2012|
|More literature||TI and Altera Ease Design Process with Compatible Evaluation Tools||25 Apr 2011|
|More literature||TI and Xilinx Ease Design Process with Compatible Evaluation Tools||25 Apr 2011|
For additional terms or required resources, click any title below to view the detail page where available.
|VQFN (RGC)||64||View options|
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