ADS5242

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Quad-Channel, 12-Bit, 65-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 65 Resolution (Bits) 12 Number of input channels 4 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 599 Architecture Pipeline SNR (dB) 71.1 ENOB (Bits) 11.5 SFDR (dB) 88 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

HTQFP (PAP) 64 100 mm² 10 x 10 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Maximum Sample Rate: 65MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation
      Internal Reference: 660mW
      External Reference: 594mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 70.8dBFS SNR at 10MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • HTQFP-64 PowerPAD™ Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking
    • Communications

PowerPAD is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.

open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS5242 is a high-performance, 65MSPS, 4-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the four data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5242 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode.

The device is available in an HTQFP-64 PowerPAD package and is specified over a -40°C to +85°C operating range.

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

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Type Title Date
* Data sheet 4-Channel, 12-Bit, 65MSPS Analog-to-Digital Converter with Serial LVDS Interface datasheet (Rev. C) Oct. 19, 2005
Technical article Keys to quick success using high-speed data converters Oct. 13, 2020
Technical article How to achieve fast frequency hopping Mar. 03, 2019
Technical article RF sampling: Learning more about latency Feb. 09, 2017
Technical article Why phase noise matters in RF sampling converters Nov. 28, 2016
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) May 22, 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) Jul. 19, 2013
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs Sep. 04, 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
User guide ADS5240/5242 EVM User's Guide Oct. 20, 2005
Application note Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x Feb. 23, 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software development

SUPPORT SOFTWARE Download
High-speed data converter pro software
DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
Features
  • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
  • Works with all TI high-speed DAC, ADC, and AFE products
  • Provides time-domain and frequency-domain analysis
  • Supports single-tone, multi-tone, and modulated (...)

Design tools & simulation

SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
CALCULATION TOOL Download
Analog-to-digital converter (ADC) harmonic calculator
ADC-HARMONIC-CALC

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

CALCULATION TOOL Download
Jitter and SNR Calculator for ADCs
JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

CAD/CAE symbols

Package Pins Download
HTQFP (PAP) 64 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

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