ADS5483

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16-Bit, 135-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 135 Resolution (Bits) 16 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 485 Features High Performance Rating Catalog Input range (Vp-p) 3 Power consumption (Typ) (mW) 2100 Architecture Pipeline SNR (dB) 79 ENOB (Bits) 12.6 SFDR (dB) 97 Operating temperature range (C) -40 to 85 Input buffer Yes open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RGC) 64 81 mm² 9.0 x 9.0 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • 80/105/135-MSPS Sample Rates
  • 16-Bit Resolution
  • SFDR: 95 dBc at 70 MHz and 135 MSPS
  • SNR: 78.6 dBFS at 70 MHz and 135 MSPS
  • Efficient DDR LVDS-Compatible Outputs
  • Internal Dither Available
  • Total Power Dissipation: 2.2 W
  • Power-Down Mode: 70 mW
  • On-Chip High Impedance Analog Buffer
  • QFN-64 PowerPAD Package (9 mm × 9 mm Footprint)
  • Industrial Temperature Range: –40°C to +85°C
  • APPLICATIONS
    • Wireless Infrastructure (Multi-Carrier GSM, WCDMA, LTE)
    • Test and Measurement Instrumentation
    • Software-Defined Radio
    • Data Acquisition
    • Power Amplifier Linearization
    • Communication Instrumentation
    • Radar
    • Medical Imaging

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open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS5481/ADS5482/ADS5483 (ADS548x) is a 16-bit family of analog-to-digital converters (ADCs) that operate from both a 5-V supply and 3.3-V supply while providing LVDS-compatible digital outputs. The ADS548x integrated analog input buffer isolates the internal switching of the onboard track and hold (T&H) from disturbing the signal source while providing a high-impedance input. An internal reference generator is also provided to simplify the system design.

Designed for highest total ENOB, the ADS548x family has outstanding low noise performance and spurious-free dynamic range.

The ADS548x is available in an QFN-64 PowerPAD package. The device is built on Texas Instruments complementary bipolar process (BiCom3) and is specified over the full industrial temperature range (–40°C to +85°C).

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet 16-Bit, 80/105/135 MSPS High-Speed ADCs datasheet (Rev. C) Oct. 06, 2009
Technical articles Keys to quick success using high-speed data converters Oct. 13, 2020
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Application note Q3 2009 Issue Analog Applications Journal Sep. 24, 2018
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) May 22, 2015
Application note Power-supply design for high-speed ADCs (Rev. A) May 18, 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) Jul. 19, 2013
Application note High-Speed, Analog-to-Digital Converter Basics Jan. 11, 2012
Application note 3Q 2011 Issue Analog Applications Journal Sep. 16, 2011
Application note Clock jitter analyzed in the time domain, Part 3 Sep. 16, 2011
Application note Журнал по применению аналоговых компонентов 3Q 2011 Sep. 01, 2011
More literature TI and Altera Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
More literature TI and Xilinx Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
Application note Input Impedance Measurement Using ADC FFT Data Jan. 11, 2011
Application note 4Q 2010 Issue Analog Applications Journal Nov. 15, 2010
Application note Clock jitter analyzed in the time domain, Part 2 Nov. 15, 2010
More literature Журнал по применению аналоговых компонентов 1 кв. 2010 Sep. 23, 2010
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application note Impact of sampling-clock spurs on ADC performance Jul. 14, 2009
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
User guide ADS548xEVM Aug. 12, 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
Application note QFN Layout Guidelines Jul. 28, 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
Description

The ADS5483EVM is a circuit board which allows the designer to run an evaluation of Texas Instruments’ ADS5483 device, a 16-bit 135 MSPS ADC with DDR LVDS outputs. With the supplied logic analyzer breakout board, the ADC LVDS output can be directly captured using either an Agilent E5405A or (...)

Features
  • Transformer coupled analog input path
  • CDCE72010 Jitter Clock Synchronizer and Jitter Cleaner clocking circuit
  • DDR LVDS output and capture ability
EVALUATION BOARD Download
99
Description

The TSW1405EVM is a low cost data capture circuit board used to evaluate some of Texas Instruments’ (TI) most popular high speed analog-to-digital converters (ADC).

 

The TSW1405EVM supports a high speed LVDS bus capable of providing 16-bit samples at 1.0 GSPS. The platform supports a 64k sample depth (...)

Features
  • Simple 16-bit waveform capture from many of TI’s high speed ADC EVM’s
  • Supports 64k sample depth at up to 1.0 GSPS LVDS I/O rates
  • LatticeECP3 high speed mini FPGA
  • Analyzes up to 8 channels concurrently
  • Single mini USB cable for power and data
  • Utilizes an intuitive/easy-to-use GUI package
  • Industry’s (...)
  • Software development

    SUPPORT SOFTWARE Download
    High-speed data converter pro software
    DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
    Features
    • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
    • Works with all TI high-speed DAC, ADC, and AFE products
    • Provides time-domain and frequency-domain analysis
    • Supports single-tone, multi-tone, and modulated (...)

    Design tools & simulation

    SIMULATION MODEL Download
    SLAC212A.ZIP (6 KB) - IBIS Model
    SIMULATION TOOL Download
    PSpice® for TI design and simulation tool
    PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
    Features
    • Leverages Cadence PSpice Technology
    • Preinstalled library with a suite of digital models to enable worst-case timing analysis
    • Dynamic updates ensure you have access to most current device models
    • Optimized for simulation speed without loss of accuracy
    • Supports simultaneous analysis of multiple products
    • (...)
    CALCULATION TOOL Download
    Analog-to-digital converter (ADC) harmonic calculator
    ADC-HARMONIC-CALC

      The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

      Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

    CALCULATION TOOL Download
    Jitter and SNR Calculator for ADCs
    JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

    CAD/CAE symbols

    Package Pins Download
    VQFN (RGC) 64 View options

    Ordering & quality

    Information included:
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    • Device marking
    • Lead finish/Ball material
    • MSL rating/Peak reflow
    • MTBF/FIT estimates
    • Material content
    • Qualification summary
    • Ongoing reliability monitoring

    Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

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