ADS6145/ADS6144/ADS6143/ADS6142 (ADS614X) are a family of 14-bit A/D converters with sampling frequencies up to 125 MSPS. The high performance and low power consumption of the ADS614X are combined in a compact 32 QFN package. An internal high bandwidth sample and hold and a low jitter clock buffer help to achieve high SNR and high SFDR even at high input frequencies.
The ADS614X feature coarse and fine gain options to improve SFDR performance at lower full-scale analog input ranges.
The digital data outputs are either parallel CMOS or DDR (Double Data Rate) LVDS. Several features exist to ease data capture such as — controls for output clock position and output buffer drive strength, LVDS current, and internal termination programmability.
The output interface type, gain, and other functions are programmed using a 3-wire serial interface. Alternatively, some functions are configured using dedicated parallel pins so the device powers up to the desired state.
The ADS614X include internal references while eliminating traditional reference pins and associated external decoupling. External reference mode is also supported.
The ADS614X are specified over the industrial temperature range (-40°C to 85°C).
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS datasheet (Rev. B) | Dec 4, 2007 | |
| Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | May 22, 2015 | ||
| Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | Jul 19, 2013 | ||
| Application note | Band-Pass Filter Design Techniques for High-Speed ADCs | Feb 27, 2012 | ||
| Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | Sep 10, 2010 | ||
| Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | Apr 28, 2009 | ||
| Application note | CDCE62005 as Clock Solution for High-Speed ADCs | Sep 4, 2008 | ||
| Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | Jun 8, 2008 | ||
| Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | Jun 2, 2008 | ||
| Application note | QFN Layout Guidelines | Jul 28, 2006 |
For additional terms or required resources, click any title below to view the detail page where available.
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RHB) | 32 | Ultra Librarian |
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