The AFE5812 is a highly-integrated analog front-end (AFE) solution specifically designed
for ultrasound systems in which high performance and small size are required. The AFE5812
integrates a complete time-gain-control (TGC) imaging path and a CWD path. It also enables users to
select one of various power/noise combinations to optimize system performance. Therefore, the
AFE5812 is a suitable ultrasound AFE solution not only for high-end systems, but also for portable
ones.
The AFE5812 contains eight channels of voltage controlled amplifier (VCA), 14, and 12-bit
ADC, and CW mixer. The VCA includes LNA, VCAT, PGA, and LPF. The LNA gain is programmable to
support 250 mVPP to 0.75 VPP input signals.
Programmable active termination is also supported by the LNA. The ultra-low noise VCAT provides an
attenuation control range of 40 dB and improves overall low-gain SNR, which benefits harmonic
imaging and near-field imaging. The PGA provides gain options of 24 and 30 dB. Before the ADC, a
LPF can be configured as 10, 15, 20, 30, 35 or 50 MHz to support ultrasound applications with
different frequencies. In addition, the signal chain of the AFE5812 can handle signal frequency
lower than 100 kHz, which enables the AFE5812 to be used in both sonar and medical applications.
The high-performance 14-bit/65-MSPS ADC in the AFE5812 achieves 77 dBFS SNR. It ensures excellent
SNR at low chain gain. The ADC’s LVDS outputs enable flexible system integration desired for
miniaturized systems.
The AFE5812 integrates a low-power passive mixer and a low-noise summing amplifier to
accomplish on-chip CWD beamformer. 16 selectable phase-delays can be applied to each analog input
signal. Meanwhile, a unique third- and fifth-order harmonic suppression filter is implemented to
enhance CW sensitivity.
AFE5812 also includes a digital in-phase and quadrature (I/Q) demodulator and a low-pass
decimation filter. The main purpose of the demodulation block is to reduce the LVDS data rate and
improve overall system power efficiency. The I/Q demodulator can accept ADC output with up to 65
MSPS sampling rate and 14-bit resolution. For example, after digital demodulation and 4× decimation
filtering, the data rate for either in-phase or quadrature output is reduced to 16.25 MSPS and the
data resolution is improved to 16 bits, consequently. Hence, the overall LVDS trace reduction can
be a factor of 2. This demodulator can be bypassed and powered down completely if it is not
needed.
The AFE5812 is available in a 15-mm × 9-mm, 135-pin BGA package, and it is specified for
operation from 40°C to 85°C.
The AFE5812 is a highly-integrated analog front-end (AFE) solution specifically designed
for ultrasound systems in which high performance and small size are required. The AFE5812
integrates a complete time-gain-control (TGC) imaging path and a CWD path. It also enables users to
select one of various power/noise combinations to optimize system performance. Therefore, the
AFE5812 is a suitable ultrasound AFE solution not only for high-end systems, but also for portable
ones.
The AFE5812 contains eight channels of voltage controlled amplifier (VCA), 14, and 12-bit
ADC, and CW mixer. The VCA includes LNA, VCAT, PGA, and LPF. The LNA gain is programmable to
support 250 mVPP to 0.75 VPP input signals.
Programmable active termination is also supported by the LNA. The ultra-low noise VCAT provides an
attenuation control range of 40 dB and improves overall low-gain SNR, which benefits harmonic
imaging and near-field imaging. The PGA provides gain options of 24 and 30 dB. Before the ADC, a
LPF can be configured as 10, 15, 20, 30, 35 or 50 MHz to support ultrasound applications with
different frequencies. In addition, the signal chain of the AFE5812 can handle signal frequency
lower than 100 kHz, which enables the AFE5812 to be used in both sonar and medical applications.
The high-performance 14-bit/65-MSPS ADC in the AFE5812 achieves 77 dBFS SNR. It ensures excellent
SNR at low chain gain. The ADC’s LVDS outputs enable flexible system integration desired for
miniaturized systems.
The AFE5812 integrates a low-power passive mixer and a low-noise summing amplifier to
accomplish on-chip CWD beamformer. 16 selectable phase-delays can be applied to each analog input
signal. Meanwhile, a unique third- and fifth-order harmonic suppression filter is implemented to
enhance CW sensitivity.
AFE5812 also includes a digital in-phase and quadrature (I/Q) demodulator and a low-pass
decimation filter. The main purpose of the demodulation block is to reduce the LVDS data rate and
improve overall system power efficiency. The I/Q demodulator can accept ADC output with up to 65
MSPS sampling rate and 14-bit resolution. For example, after digital demodulation and 4× decimation
filtering, the data rate for either in-phase or quadrature output is reduced to 16.25 MSPS and the
data resolution is improved to 16 bits, consequently. Hence, the overall LVDS trace reduction can
be a factor of 2. This demodulator can be bypassed and powered down completely if it is not
needed.
The AFE5812 is available in a 15-mm × 9-mm, 135-pin BGA package, and it is specified for
operation from 40°C to 85°C.