ADS5527

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12-Bit, 210-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 210 Resolution (Bits) 12 Number of input channels 1 Analog input BW (MHz) 800 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 1230 Architecture Pipeline SNR (dB) 70.7 ENOB (Bits) 11.4 SFDR (dB) 86 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RGZ) 48 49 mm² 7.0 x 7.0 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Maximum Sample Rate: 210 MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation 1.23 W
  • Internal Sample and Hold
  • 70.5-dBFS SNR at 70-MHz IF
  • 84-dBc SFDR at 70-MHz IF, 0-dB gain
  • High Analog Bandwith up to 800 MHz
  • Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
  • Programmable Gain up to 6 dB for SNR/SFDR Trade-Off at High IF
  • Reduced Power Modes at Lower Sample Rates
  • Supports Input Clock Amplitude Down to
    400 mVPP
  • Clock Duty Cycle Stabilizer
  • No External Reference Decoupling Required
  • Internal and External Reference Support
  • Programmable Output Clock Position to Ease Data Capture
  • 3.3-V Analog and Digital Supply
  • 48-QFN Package (7 mm × 7 mm)
  • APPLICATIONS
    • Wireless Communications Infrastructure
    • Software Defined Radio
    • Power Amplifier Linearization
    • 802.16d/e
    • Test and Measurement Instrumentation
    • High Definition Video
    • Medical Imaging
    • Radar Systems

open-in-new Find other High-speed ADCs (>10MSPS)

Description

ADS5527 is a high performance 12-bit, 210-MSPS A/D converter. It offers state-of-the art functionality and performance using advanced techniques to minimize board space. With high analog bandwidth and low jitter input clock buffer, the ADC supports both high SNR and high SFDR at high input frequencies. It features programmable gain options that can be used to improve SFDR performance at lower full-scale analog input ranges.

In a compact 48-pin QFN, the device offers fully differential LVDS DDR (Double Data Rate) interface while parallel CMOS outputs can also be selected. Flexible output clock position programmability is available to ease capture and trade-off setup for hold times. At lower sampling rates, the ADC can be operated at scaled down power with no loss in performance. The ADS5527 includes an internal reference, while eliminating the traditional reference pins and associated external decoupling. The device also supports an external reference mode.

The device is specified over the industrial temperature range (-40°C to 85°C).

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The ADS5517EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS5517 device, an 11 bit 200 MSPS analog to digital converter. The circuit board allows for the ability to evaluate the ADS5517 operating in either DDR LVDS output mode or CMOS output (...)

Features
  • Isolated analog 3.3 V supplies and digital 3.3 V supplies
  • ADC evaluation in DDR LVDS mode
  • ADC evaluation in CMOS mode
  • CMOS logic analyzer output header
  • TI THS4509 or transformer coupled analog input path
  • Onboard programmable FPGA
  • FPGA power management provided by the TI TPS75003
  • Expansion module capability

Software development

PROGRAMMING TOOLS Download
SUPPORT SOFTWARE Download
High-speed data converter pro software
DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
Features
  • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
  • Works with all TI high-speed DAC, ADC, and AFE products
  • Provides time-domain and frequency-domain analysis
  • Supports single-tone, multi-tone, and modulated (...)

Design tools & simulation

SIMULATION MODELS Download
SLWM001.ZIP (240 KB) - IBIS Model
CALCULATION TOOLS Download
Jitter and SNR Calculator for ADCs
JITTER-SNR-CALC JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

CAD/CAE symbols

Package Pins Download
VQFN (RGZ) 48 View options

Ordering & quality

Support & training

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