ADS6128 12-Bit, 210-MSPS Analog-to-Digital Converter (ADC) | TI.com

ADS6128
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12-Bit, 210-MSPS Analog-to-Digital Converter (ADC)

12-Bit, 210-MSPS Analog-to-Digital Converter (ADC) - ADS6128
Datasheet
14/12 Bit, 250/210 MSPS ADC with DDR LVDS and Parallel CMOS Outputs datasheet (Rev. B)
 

Description

ADS614X (ADS612X) is a family of 14-bit (12-bit) A/D converters with sampling rates up to 250 MSPS. It combines high dynamic performance and low power consumption in a compact 48 QFN package. This makes it well-suited for multicarrier, wide band-width communications applications.

ADS614X/2X has fine gain options that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (-40°C to 85°C).

Features

  • Maximum Sample Rate: 250 MSPS
  • 14-Bit Resolution — ADS614X
  • 12-Bit Resolution — ADS612X
  • 687 mW Total Power Dissipation at 250 MSPS
  • Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
  • Programmable Fine Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Input Clock Amplitude Down to 400 mVPP Differential
  • Internal and External Reference Support
  • 48-QFN Package (7mm × 7mm)
  • Pin Compatible with ADS5547 Family
  • APPLICATIONS
    • Multicarrier, Wide Band-Width Communications
    • Wireless Multi-carrier Communications Infrastructure
    • Software Defined Radio
    • Power Amplifier Linearization
    • 802.16d/e
    • Test and Measurement Instrumentation
    • High Definition Video
    • Medical Imaging
    • Radar Systems

Parametrics

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Part number Order Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
ADS6128 Order now 210     High Performance     12     1     70.9     11.2     92     628     2     Parallel CMOS
Parallel LVDS    		 -40 to 85     700     No     VQFN | 48     48VQFN: 49 mm2: 7 x 7 (VQFN | 48)     Catalog     Pipeline    
ADS6122 Samples not available 65     Low Power     12     1     71.8     11.56     95     285     2     DDR LVDS
Parallel CMOS    		 -40 to 85     500     No     VQFN | 32     32VQFN: 25 mm2: 5 x 5 (VQFN | 32)     Catalog     Pipeline    
ADS6123 Samples not available 80     Low Power     12     1     71.8     11.55     93     318     2     DDR LVDS
Parallel CMOS    		 -40 to 85     500     No     VQFN | 32     32VQFN: 25 mm2: 5 x 5 (VQFN | 32)     Catalog     Pipeline    
ADS6124 Samples not available 105     Low Power     12     1     71.5     11.5     91     374     2     DDR LVDS
Parallel CMOS    		 -40 to 85     500     No     VQFN | 32     32VQFN: 25 mm2: 5 x 5 (VQFN | 32)     Catalog     Pipeline    
ADS6125 Samples not available 125     Low Power     12     1     71.5     11.4     90     417     2     DDR LVDS
Parallel CMOS