14-Bit, 170-MSPS Analog-to-Digital Converter (ADC)
Product details
Parameters
Package | Pins | Size
Features
- Maximum Sample Rate: 170 MSPS
- 14-Bit Resolution
- No Missing Codes
- Total Power Dissipation 1.1 W
- Internal Sample and Hold
- 74-dBFS SNR at 70-MHz IF
- 85-dBc SFDR at 70-MHz IF, 0 dB gain
- 11.4 ENOB Minimum at 70-MHz IF
- Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
- Programmable Gain up to 6 dB for SNR/SFDR Trade-Off at High IF
- Reduced Power Modes at Lower Sample Rates
- Supports input clock amplitude down to 400 mVPP
- Clock Duty Cycle Stabilizer
- No External Reference Decoupling Required
- Internal and External Reference Support
- Programmable Output Clock position to ease data capture
- 3.3-V Analog and Digital Supply
- 48-QFN Package (7 mm × 7 mm)
- APPLICATIONS
- Wireless Communications Infrastructure
- Software Defined Radio
- Power Amplifier Linearization
- 802.16d/e
- Test and Measurement Instrumentation
- High Definition Video
- Medical Imaging
- Radar Systems
Description
ADS5545 is a high performance 14-bit, 170-MSPS A/D converter. It offers state-of-the-art functionality and performance using advanced techniques to minimize board space. Using an internal sample and hold and low jitter clock buffer, the ADC supports both high SNR and high SFDR at high input frequencies. It features programmable gain options that can be used to improve SFDR performance at lower full-scale analog input ranges.
In a compact 48-pin QFN, the device offers fully differential LVDS DDR (Double Data Rate) interface while parallel CMOS outputs can also be selected. Flexible output clock position programmability is available to ease capture and trade-off setup for hold times. At lower sampling rates, the ADC can be operated at scaled down power with no loss in performance. ADS5545 includes an internal reference, while eliminating the traditional reference pins and associated external decoupling. The device also supports an external reference mode.
The device is specified over the industrial temperature range (-40°C to 85°C).
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Software development
Features
- Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
- Works with all TI high-speed DAC, ADC, and AFE products
- Provides time-domain and frequency-domain analysis
- Supports single-tone, multi-tone, and modulated (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
VQFN (RGZ) | 48 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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Support & training
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