ADS4242

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Dual-Channel, 14-Bit, 65-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 65 Resolution (Bits) 14 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 600 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 183 Architecture Pipeline SNR (dB) 73.6 ENOB (Bits) 11.5 SFDR (dB) 91 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RGC) 64 81 mm² 9 x 9 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Ultralow Power With Single 1.8-V Supply, CMOS
    Output:
    • 183 mW Total Power at 65 MSPS
    • 277 mW Total Power at 125 MSPS
    • 332 mW Total Power at 160 MSPS
  • High Dynamic Performance:
    • 88-dBc SFDR at 170 MHz
    • 71.4-dBFS SNR at 170 MHz
  • Crosstalk: > 90 dB at 185 MHz
  • Programmable Gain up to 6 dB for SNR/SFDR
    Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8-V parallel CMOS Interface
    • Double Data Rate (DDR) LVDS With
      Programmable swing:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
  • Supports Low Input Clock Amplitude Down to
    200 mVPP
  • Package: VQFN-64 (9.00 mm × 9.00 mm)
open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADS424x and ADS422x family of devices are low-speed variants of the ADS42xx ultralow-power family of dual-channel, 14-bit/12-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8-V supply. This topology makes the ADS424x/422x well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS424x/422x have gain options that can be used to improve SFDR performance at lower full-scale input ranges. These devices include a dc offset correction loop that can be used to cancel the ADC offset. Both DDR (double data rate) LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64 package.

The devices include internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. All devices are specified over the industrial temperature range (–40°C to 85°C).

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 18
Type Title Date
* Datasheet ADS42xx Dual-Channel, 14-/12-Bit, 160/125/65 MSPS Ultralow-Power ADC datasheet (Rev. D) Oct. 27, 2015
Technical articles Keys to quick success using high-speed data converters Oct. 13, 2020
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) May 22, 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) Jul. 19, 2013
User guide ADS42xx EVM User’s Guide (Rev. A) Jun. 21, 2013
User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) Jul. 10, 2012
Application note High-Speed, Analog-to-Digital Converter Basics Jan. 11, 2012
More literature TI and Altera Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
More literature TI and Xilinx Ease Design Process with Compatible Evaluation Tools Apr. 25, 2011
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) Sep. 10, 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs Sep. 04, 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008
Application note QFN Layout Guidelines Jul. 28, 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
Description

The ADS4242EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4242 device, an extremely low power dual channel 14-bit 65 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)

Features
  • Transformer coupled analog input path
  • Amplifier path based on the THS4509
  • Configurable CMOS or DDR LVDS parallel output modes
  • Transformer coupled clock input path
  • CDCE72010 Jitter Clock Synchronizer and Jitter Cleaner clocking circuit
  • DDR LVDS output and capture ability via TSW1400EVM or TSW1405EVM (...)
  • EVALUATION BOARD Download
    document-generic User guide
    99
    Description

    The TSW1405EVM is a low cost data capture circuit board used to evaluate some of Texas Instruments’ (TI) most popular high speed analog-to-digital converters (ADC).

     

    The TSW1405EVM supports a high speed LVDS bus capable of providing 16-bit samples at 1.0 GSPS. The platform supports a 64k sample depth (...)

    Features
  • Simple 16-bit waveform capture from many of TI’s high speed ADC EVM’s
  • Supports 64k sample depth at up to 1.0 GSPS LVDS I/O rates
  • LatticeECP3 high speed mini FPGA
  • Analyzes up to 8 channels concurrently
  • Single mini USB cable for power and data
  • Utilizes an intuitive/easy-to-use GUI package
  • Industry’s (...)
  • Software development

    GUI FOR EVALUATION MODULE (EVM) Download
    SBAC113B.ZIP (129504 KB)
    SUPPORT SOFTWARE Download
    High-speed data converter pro software
    DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
    Features
    • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
    • Works with all TI high-speed DAC, ADC, and AFE products
    • Provides time-domain and frequency-domain analysis
    • Supports single-tone, multi-tone, and modulated (...)

    Design tools & simulation

    SIMULATION MODEL Download
    SBAM094B.ZIP (40 KB) - IBIS Model
    SIMULATION TOOL Download
    PSpice® for TI design and simulation tool
    PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
    Features
    • Leverages Cadence PSpice Technology
    • Preinstalled library with a suite of digital models to enable worst-case timing analysis
    • Dynamic updates ensure you have access to most current device models
    • Optimized for simulation speed without loss of accuracy
    • Supports simultaneous analysis of multiple products
    • (...)
    SCHEMATIC Download
    SLAC459B.ZIP (6548 KB)

    CAD/CAE symbols

    Package Pins Download
    VQFN (RGC) 64 View options

    Ordering & quality

    Information included:
    • RoHS
    • REACH
    • Device marking
    • Lead finish/Ball material
    • MSL rating/Peak reflow
    • MTBF/FIT estimates
    • Material content
    • Qualification summary
    • Ongoing reliability monitoring

    Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

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