Product details

Sample rate (max) (Msps) 40 Resolution (Bps) 14 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 300 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2, 4 Power consumption (typ) (mW) 900 Architecture Pipeline SNR (dB) 76 ENOB (Bps) 12.1 SFDR (dB) 83 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 40 Resolution (Bps) 14 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 300 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2, 4 Power consumption (typ) (mW) 900 Architecture Pipeline SNR (dB) 76 ENOB (Bps) 12.1 SFDR (dB) 83 Operating temperature range (°C) -40 to 85 Input buffer No
LQFP (PM) 64 144 mm² 12 x 12
  • HIGH DYNAMIC RANGE:
       High SFDR: 83dB at 10MHz fIN
       High SNR: 75dB at 10MHz fIN
  • ON-BOARD TRACK-AND-HOLD:
       Differential Inputs
       Selectable Full-Scale Input Range
  • LOW POWER: 850mW
  • FLEXIBLE CLOCKING:
       Differential or Single-Ended
       Accepts Sine or Square Wave Clocking Down to 0.5VPP
       Variable Threshold Level
  • APPLICATIONS
    • COMMUNICATIONS RECEIVERS
    • TEST INSTRUMENTATION
    • PROFESSIONAL CCD IMAGING

All trademarks are the property of their respective owners.

  • HIGH DYNAMIC RANGE:
       High SFDR: 83dB at 10MHz fIN
       High SNR: 75dB at 10MHz fIN
  • ON-BOARD TRACK-AND-HOLD:
       Differential Inputs
       Selectable Full-Scale Input Range
  • LOW POWER: 850mW
  • FLEXIBLE CLOCKING:
       Differential or Single-Ended
       Accepts Sine or Square Wave Clocking Down to 0.5VPP
       Variable Threshold Level
  • APPLICATIONS
    • COMMUNICATIONS RECEIVERS
    • TEST INSTRUMENTATION
    • PROFESSIONAL CCD IMAGING

All trademarks are the property of their respective owners.

The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.

The ADS5421 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.

The ADS5421 is available in a small LQFP-64 package.

The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.

The ADS5421 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.

The ADS5421 is available in a small LQFP-64 package.

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Technical documentation

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Type Title Date
* Data sheet 14-Bit, 40MHz Sampling Analog-to-Digital Converter datasheet (Rev. E) 22 Jun 2005
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note High-Speed, Analog-to-Digital Converter Basics 11 Jan 2012
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
EVM User's guide ADS5421/22EVM 30 Jan 2003

Design & development

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Calculation tool

ADC-HARMONIC-CALC — Analog-to-digital converter (ADC) harmonic calculator

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

Calculation tool

JITTER-SNR-CALC — Jitter and SNR Calculator for ADCs

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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