Design tool
Data sheet
ADS5407
- Dual Channel
- 12-Bit Resolution
- Maximum Clock Rate: 500 Msps
- Low Swing Fullscale Input: 1.25 Vpp
- Analog Input Buffer with High Impedance Input
- Input Bandwidth (3dB): >1.0 GHz
- Data Output Interface: DDR LVDS
- Optional 2x Decimation with Low Pass or
High Pass Filter - 196-Pin BGA Package (12 × 12mm)
The ADS5407 is a high linearity dual channel 12-bit, 500 MSPS analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Optionally the output data can be decimated by two. Designed for high SFDR, the ADC has low-noise performance and outstanding spurious-free dynamic range over a large input-frequency range. The device is available in a 196 pin BGA package and is specified over the full industrial temperature range (–40°C to 85°C).
Technical documentation
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View all 6 | Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | Dual Channel 12-Bit 500 Msps Analog to Digital Converter datasheet (Rev. B) | 08 Jan 2014 | |
| More literature | Comparing Power-Supply Architectures for a 12-bit ADC | 25 Jul 2017 | ||
| Technical article | Do you always need a LDO in front of your data converter? | 22 Dec 2016 | ||
| Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 22 May 2015 | ||
| Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 19 Jul 2013 | ||
| User guide | ADS540x and ADS54T0x Evaluation Module | 28 Jun 2012 |
Design & development
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Simulation tool
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs
PMP9767 — Efficient, LDO-free Power Supply for a 12-bit 500-MSPS ADC Reference Design
The electrical performance of data converters depends on the cleanliness of their supply voltages. Linear regulators (LDOs) are commonly used but have low efficiency and high power loss, which is unsuitable for portable applications.
Using a switch mode power supply (SMPS) instead, such as the (...)
| Package | Pins | Download |
|---|---|---|
| NFBGA (ZAY) | 196 | View options |
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