The RM57L843 device is part of the Hercules RM series of
high-performance ARM® Cortex®-R-based MCUs. Comprehensive documentation,
tools, and software are available to assist in the development of IEC 61508
functional safety applications. Start evaluating today with the Hercules RM57x LaunchPad Development Kit. The RM57L843 device has on-chip
diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST)
logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection
on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC
or parity protection on peripheral memories and loopback capability on
The RM57L843 device integrates two ARM Cortex-R5F floating-point CPUs,
operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can
run up to 330 MHz providing up to 547 DMIPS. The device supports the
little-endian [LE] format.
The RM57L843 device has 4MB of integrated flash and 512KB of data RAM
with single-bit error correction and double-bit error detection. The flash
memory on this device is a nonvolatile, electrically erasable and
programmable memory, implemented with a 64-bit-wide data bus interface. The
flash operates on a 3.3-V supply input (the same level as the I/O supply) for
all read, program, and erase operations. The SRAM supports read and write
accesses in byte, halfword, and word modes.
The RM57L843 device features peripherals for real-time control-based
applications, including two Next Generation High-End Timer (N2HET) timing
coprocessors with up to 64 total I/O terminals.
The N2HET is an advanced intelligent timer that provides sophisticated timing
functions for real-time applications. The timer is software-controlled, with
a specialized timer micromachine and an attached I/O port. The N2HET can be
used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The
N2HET is especially well suited for applications requiring multiple sensor
information or drive actuators with complex and accurate time pulses. The
High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to
transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is
built into the HTU.
The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse
width waveforms with minimal CPU overhead or intervention. The ePWM is easy to
use and supports both high-side and low-side PWM and deadband generation.
With integrated trip zone protection and synchronization with the on-chip
MibADC, the ePWM is ideal for digital motor control applications.
The Enhanced Capture (eCAP) module is essential in systems where the
accurately timed capture of external events is important. The eCAP can also
be used to monitor the ePWM outputs or for simple PWM generation when not
needed for capture applications.
The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces
with a linear or rotary incremental encoder to get position, direction, and
speed information from a rotating machine as used in high-performance motion
and position-control systems.
The device has two 12-bit-resolution MibADCs with 41 total channels and 64
words of parity-protected buffer RAM. The MibADC channels can be converted
individually or by group for special conversion sequences. Sixteen channels are
shared between the two MibADCs. Each MibADC supports three separate
groupings. Each sequence can be converted once when triggered or configured for
continuous conversion mode. The MibADC has a 10-bit mode for use when
compatibility with older devices or faster conversion time is desired. One of
the channels in MibADC1 and two of the channels in MibADC2 can be used to
convert temperature measurements from the three on-chip temperature
The device has multiple communication interfaces: Five MibSPIs; four
UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules;
and one Ethernet controller. The SPI provides a convenient method of serial
interaction for high-speed communications between similar shift-register type
devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can
be used as a UART in full-duplex mode using the standard Non-Return-to-Zero
(NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a
serial, multimaster communication protocol that efficiently supports distributed
real-time control with robust communication rates of up to 1 Mbps. The DCAN
is ideal for applications operating in noisy and harsh environments (for
example, automotive and industrial fields) that require reliable serial
communication or multiplexed wiring. The Ethernet module supports MII,
RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a
multimaster communication module providing an interface between the
microcontroller and an I2C-compatible device through the
I2C serial bus. The I2C module supports speeds of 100 and 400
The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the
external frequency reference to a higher frequency for internal use. The
Global Clock Module (GCM) manages the mapping between the available clock
sources and the internal device clock domains.
The device also has two External Clock Prescaler (ECP) modules. When enabled,
the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls.
The ECLK frequency is a user-programmable ratio of the peripheral interface
clock (VCLK) frequency. This low-frequency output can be monitored externally as
an indicator of the device operating frequency.
The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral
requests, and ECC protection on its memory. An MPU is built into the DMA to
protect memory against erroneous transfers.
The Error Signaling Module (ESM) monitors on-chip device errors and
determines whether an interrupt or external Error pin/ball (nERROR) is
triggered when a fault is detected. The nERROR signal can be monitored
externally as an indicator of a fault condition in the microcontroller.
The External Memory Interface (EMIF) provides a memory extension to
asynchronous and synchronous memories or other slave devices.
A Parameter Overlay Module (POM) is included to enhance the debugging
capabilities of application code. The POM can reroute flash accesses to
internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary
for parameter updates in flash. This capability is particularly helpful
during real-time system calibration cycles.
Several interfaces are implemented to enhance the debugging capabilities of
application code. In addition to the built-in ARM Cortex-R5F CoreSight debug
features, the Embedded Cross Trigger (ECT) supports the interaction and
synchronization of multiple triggering events within the SoC. An External
Trace Macrocell (ETM) provides instruction and data trace of program execution.
For instrumentation purposes, a RAM Trace Port (RTP) module is implemented
to support high-speed tracing of RAM and peripheral accesses by the CPU or
any other master. A Data Modification Module (DMM) gives the ability to write
external data into the device memory. Both the RTP and DMM have no or minimal
impact on the program execution time of the application code.
With integrated safety features and a wide choice of communication and
control peripherals, the RM57L843 device is an ideal solution for
high-performance real-time control applications with safety-critical