SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
This section identifies the requirements for initializing the surrounding modules when the module is to be used for the first time after a device reset.
Surrounding Modules | Comments |
---|---|
LPSC15 | Module reset must be enabled. For more information about the module configuration, see Reset. |
WKUP_PLLCTRL0 | WKUP_PLLCTRL0 configuration must be done to enable the clocks to the ADC module, see Clocking. |
WKUP_HFOSC0 | WKUP_HFOSC0 configuration must be done to enable the clocks to the ADC module, see Clocking. |
MCU_PLL0 | MCU_PLL0 configuration must be done to enable the clocks to the ADC module, see Clocking. |
MCU_PLL1 | MCU_PLL1 configuration must be done to enable the clocks to the ADC module, see Clocking. |
COMPUTE_CLUSTER0 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling COMPUTE_CLUSTER0 interrupts, see Interrupts. |
MCU_R5FSS0_CORE0/1 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling MCU_R5FSS0_CORE0/1 interrupts, see Interrupts. |
R5FSS0_CORE0/1 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling R5FSS0_CORE0/1 interrupts, see Interrupts. |
MCU_ESM0 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling MCU_ESM0 interrupts, see Interrupts. |
PDMA_ADC_MCU_0 | PDMA_ADC_MCU_0 controllers configuration must be done to enable the module PDMA_ADC_MCU_0 input request, see Data Movement Architecture (DMA). |
Interconnect | For information about the MCU_CBASS0 interconnect configuration, see System Interconnect. |