SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
When a CC_ARMSS is to be powered down or with gated clocks, system shall disable sending any type of interrupts - LPI/PPI/SPI, to that A72SS. Also, sending any transactions over the AXI streaming interface to the A72SS shall be disabled.
GIC0 wake-up signal is connected to WKUP_DMSC0. WKUP_DMSC0 will have to wake-up the A72SS if a specific core is expected to service an interrupt and the core is powerdown or with gated clock.