SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 5-1567 lists the mapping for the device clock inputs.
Domain | Clock | Ball Mapping | Frequency List / Range | Type |
---|---|---|---|---|
WKUP | WKUP_HFOSC0_CLK | WKUP_OSC0_XI WKUP_OSC0_XO | 19.2, 20, 24, 25, 26, or 27 MHz | External Clock / Crystal Pins |
WKUP_LFOSC0_CLKOUT | WKUP_LF_CLKIN | 32.768 kHz | LVCMOS | |
MCU_EXT_REFCLK0 | MCU_EXT_REFCLK0 | up to 100 MHz | LVCMOS | |
MCU_CPTS_RFT_CLK | MCU_CPTS0_RFT_CLK | up to 100 MHz | LVCMOS | |
MAIN | HFOSC1_CLK | OSC1_XI OSC1_XO | 19.2, 20, 24, 25, 26, or 27 MHz For audio applications: 22.5792 MHz or 24.576 MHz | External Clock / Crystal Pins |
EXT_REFCLK1 | EXT_REFCLK1 | up to 100 MHz | LVCMOS | |
CPTS_RFT_CLK | CPTS0_RFT_CLK | up to 150 MHz | LVCMOS | |
AUDIO_EXT_REFCLK0 | AUDIO_EXT_REFCLK0 | up to 80 MHz | LVCMOS | |
AUDIO_EXT_REFCLK1 | AUDIO_EXT_REFCLK1 | up to 80 MHz | LVCMOS |
Table 5-1568 lists the internal RC-oscillator sources.
Domain | RC Oscillator | Clock | Frequency |
---|---|---|---|
WKUP | WKUP_RC_OSC_12M | CLK_12M_RC | 12.5 MHz |