SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 8-3299 shows the PVU configuration parameters set during SoC design.
Module Instance | Parameters | |||||
TLB Channels(1) | Entries per TLB Channel(1) | Source ID | Config FW | RouteID | OrderID range | |
NAVSS0_IO_PVU0 | 64 | 8 | 16 | 0x2000::3:4744 | 208 | 0-7 |
NAVSS0_DMA_PVU0 | 64 | 8 | 17 | 0x2400::3:4745 | 209 | 8-15 |