SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
The Flush Register contains the flush control of the gasket.
Bits | Field | Type | Reset | Description |
---|---|---|---|---|
31 | ext_flush | r | * | This indicates the value of the flush input synchronized to the gasket clock |
31:4 | Reserved | r | 0x0 | Reserved. Read as 0. |
3:0 | flush | r/w | 0x0000 |
This is the software control for whether the gasket is in flush mode or not. See Section 3.3.6.2.1.8.
Note that this field can be automatically set to 4’b1111 (Flush Mode) in the event of a Command Timeout (see Section 3.3.6.2.1.4) |