SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Tx PDMA Channel | PDMA Input | Source Event | Channel Type | Trigger Type | Data FIFO Address |
---|---|---|---|---|---|
8000 | UART_MAIN_2_TX_0 | UART2_USART_DMA_0 | XY | Edge | 0282 0000h |
8001 | UART_MAIN_3_TX_0 | UART3_USART_DMA_0 | XY | Edge | 0283 0000h |
Rx PDMA Channel | PDMA Input | Source Event | Channel Type | Trigger Type | Data FIFO Address |
---|---|---|---|---|---|
0 | UART_MAIN_2_RX_0 | UART2_USART_DMA_1 | XY | Edge | 0282 0000h |
1 | UART_MAIN_3_RX_0 | UART3_USART_DMA_1 | XY | Edge | 0283 0000h |