SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This register is used to read the vendor version number and specification version number
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| Instance Name | Physical Address |
|---|---|
| MMCSD0 | 0FA0 00FEh |
| 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
| VEN_VER_NUM | |||||||
| R | |||||||
| 10h | |||||||
| 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
| SPEC_VER_NUM | |||||||
| R | |||||||
| 4h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:8 | VEN_VER_NUM | R | 10h | The Vendor Version Number is set to 0x10 [1.0] Reset Source: vbus_amod_g_rst_n |
| 7:0 | SPEC_VER_NUM | R | 4h |
This status indicates the Host Controller Spec. Version. The upper and lower 4-bits indicate the version.
00h - SD Host Controller Specification Version 1.00
01h - SD Host Controller Specification Version 2.00 Including the feature of the ADMA and Test Register
02h - SD Host Controller Specification Version 3.00
03h - SD Host Controller Specification Version 4.00
04h - SD Host Controller Specification Version 4.10
'others' Reserved
4 3 2 1 0 |