SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Global USB 2.0 Root Hub Control Register The application must program this register before starting any transactions on the USB if a non-default value is desired. In Host mode, per-port registers are implemented.
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| Instance Name | Physical Address |
|---|---|
| USB0 | 3100 C640h + formula |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_31_4 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_31_4 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_31_4 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_31_4 | OVRD_L1TIMEOUT | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:4 | RESERVED_31_4 | R | 0h | Reserved |
| 3:0 | OVRD_L1TIMEOUT | R/W | 0h | Overriding the driver programmed L1TIMEOUT value. If this value is 0, the L1 Timeout value is taken from the xHCI PORTHLPMC register. If this value is non-0, then this will override the L1 Timeout value programmed in the xHCI PORTHLPMC register. In that case the actual L1 Timeout would be 2 ^ <OVRD_L1TIMEOUT-1> * 8us. [1=8us, 2=16us, 3=32us etc] Reset Source: rst_mod_g_rst_n |