SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Time Base Phase Register. This register is only available on ePWM instances that include the high-resolution PWM (HRPWM) extension, otherwise, this location is reserved.
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| Instance Name | Physical Address |
|---|---|
| EPWM0 | 2300 0006h |
| EPWM1 | 2301 0006h |
| EPWM2 | 2302 0006h |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| TBPHS | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TBPHS | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:0 | TBPHS | R/W | 0h | These bits set time-base counter phase of the selected ePWM relative to the time-base that is supplying the synchronization input signal [a] If TBCTL[PHSEN] = 0, then the synchronization event is ignored and the time-base counter is not loaded with the phase [b] If TBCTL[PHSEN] = 1, then the time-base counter [TBCNT] will be loaded with the phase [TBPHS] when a synchronization event occurs The synchronization event can be initiated by the input synchronization signal [EPWMxSYNCI] or by a software forced synchronization |