SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Global Power Management Status Register This debug register gives information on which event caused the hibernation exit. It provides internal status and state machine information, and is for Synopsys use only for debugging purposes. This register is not applicable in USB 2.0-only mode.
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| Instance Name | Physical Address |
|---|---|
| USB0 | 3100 C114h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| PORTSEL | RESERVED_27_17 | ||||||
| W | R | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_27_17 | U3WAKEUP | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| U3WAKEUP | RESERVED_10_11 | U2WAKEUP | |||||
| R | R | R | |||||
| 0h | 0h | 0h | |||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| U2WAKEUP | |||||||
| R | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:28 | PORTSEL | W | 0h | Global Power Management Status Register, PortSel This field selects the port number. Reset Source: rst_mod_g_rst_n |
| 27:17 | RESERVED_27_17 | R | 0h | Reserved |
| 16:12 | U3WAKEUP | R | 0h | U3Wakeup This field gives the following USB 3.0 port wakeup conditions: - Bit [12]: Overcurrent Detected - Bit [13]: Resume Detected - Bit [14]: Connect Detected - Bit [15]: Disconnect Detected - Bit [16]: Last Connection State Reset Source: rst_mod_g_rst_n |
| 11:10 | RESERVED_10_11 | R | 0h | Reserved |
| 9:0 | U2WAKEUP | R | 0h | U2Wakeup This field indicates the following USB 2.0 port wakeup conditions: - Bit [0]: Overcurrent Detected - Bit [1]: Resume Detected - Bit [2]: Connect Detected - Bit [3]: Disconnect Detected - Bit [4]: Last Connection State - Bit [5]: ID Change Detected - Bit [6]: SRP Request Detected - Bit [7]: ULPI Interrupt Detected - Bit [8]: USB Reset Detected - Bit [9]: Resume Detected Changed Reset Source: rst_mod_g_rst_n |