SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The Rx Flow FW Status Register 0 captures information about the thread/channel and received flow ID which failed a range check. Values in this register will remain persistent once an exception has been detected until the pend bit is written back to 0
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| Instance Name | Physical Address |
|---|---|
| DMASS0_PKTDMA_0 | 485C 0088h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| PEND | RESERVED | FLOWID | |||||
| R/W | NONE | R/W | |||||
| 0h | 0h | 0h | |||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| FLOWID | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | CHANNEL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CHANNEL | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | PEND | R/W | 0h | This bit is set whenever the Flow ID firewall detects a Flow ID is out of range for an incoming packet. Once this bit is set, the remaining fields in this register will not be modified. SW is required to write this bit to 0 to allow another exception to be captured. Reset Source: rst_mod_g_rst_n |
| 30 | RESERVED | NONE | 0h | Reserved |
| 29:16 | FLOWID | R/W | 0h | This is the flow ID that was received on the trapped packet Reset Source: rst_mod_g_rst_n |
| 15:9 | RESERVED | NONE | 0h | Reserved |
| 8:0 | CHANNEL | R/W | 0h | This is the channel number on which the trapped packet was received Reset Source: rst_mod_g_rst_n |