SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The control register defines the size of the remote cache data storage memory to use and whether the L2 is enabled.
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| Instance Name | Physical Address |
|---|---|
| RL2_0 | 2500 0004h |
| RL2_0 | 2500 1004h |
| RL2_2 | 2500 2004h |
| RL2_3 | 2500 3004h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| ENABLE | RESERVED | ||||||
| R/W | NONE | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | SIZE | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | ENABLE | R/W | 0h | The ~ienable field determines whether the L2 is enabled or not. Setting the enable from a 0 to 1 restarts the cache 0: Disabled 1: Enabled |
| 30:3 | RESERVED | NONE | 0h | Reserved |
| 2:0 | SIZE | R/W | 0h | The ~isize field determines the size of the remote cache data storage memory that is currently active. This field can be change dynamically, but will cause the entire cache to be invalidated when inflight transactions have completed. Changing the ~isize while ~ienable is already a '1' will restart the cache. 0: 8KB 1: 16KB 2: 32KB 3: 64KB 4: 128KB 5: 256KB (Dual Mode) Note: Setting this field to an invalid value will result in the field being set to '0'. The remote address range registers must be setup correctly to ensure it has sufficient memory for the selected size. |