SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The ERR_WRT_TYPE register holds the current top of stack write error info. this is only valid when the wrt_err_valid is set
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| Instance Name | Physical Address |
|---|---|
| FSS0 | 0FC1 0078h + formula |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| WRT_ERR_VALID | RESERVED | ||||||
| R/W1TC | NONE | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | WRT_ERR_BEN | WRT_ERR_ADR | WRT_ERR_ROUTEID | ||||
| NONE | R | R | R | ||||
| 0h | 0h | 0h | 0h | ||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| WRT_ERR_ROUTEID | |||||||
| R | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | WRT_ERR_VALID | R/W1TC | 0h | When set indicates that there is valid write error information available, Writing a one to this register will pop the top of the stack Reset Source: vbus_mod_g_rst_n |
| 30:14 | RESERVED | NONE | 0h | Reserved |
| 13 | WRT_ERR_BEN | R | 0h | When set indicates that there was a write error due to a non-contiguous byte enables or because write byte count was not 32-byte multiple. Please note that this bit will always be set when wrt_err_valid bit is set. There is no write error if byte count is 32-byte multiple and if byte-enables are all set. Reset Source: vbus_mod_g_rst_n |
| 12 | WRT_ERR_ADR | R | 0h | When set indicates that there was a write error due to a non-aligned address. Please note that this bit can only be set if address was 16-byte multiple but not 32-byte multiple. For example, an address of 0x10 or 0x30 for writes will cause this bit to get set. Reset Source: vbus_mod_g_rst_n |
| 11:0 | WRT_ERR_ROUTEID | R | 0h | Indicates the Route ID for the Initiator that caused the write error Reset Source: vbus_mod_g_rst_n |