SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Indicates enabled Main Domain processing elements on the device
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| Instance Name | Physical Address |
|---|---|
| WKUP_CTRL_MMR0 | 4300 0060h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | DEVICE_FEATURE0_R5FSS1_CORE1 | DEVICE_FEATURE0_R5FSS1_CORE0 | DEVICE_FEATURE0_R5FSS0_CORE1 | DEVICE_FEATURE0_R5FSS0_CORE0 | |||
| NONE | R | R | R | R | |||
| 0h | 0h | 0h | 0h | 0h | |||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:20 | RESERVED | NONE | 0h | Reserved |
| 19 | DEVICE_FEATURE0_R5FSS1_CORE1 | R | 0h | Main R5FSS1 dual/single core support Field values (others are reserved): 1'b0 - Single core 1'b1 - Dual core Reset Source: mod_por_rst_n |
| 18 | DEVICE_FEATURE0_R5FSS1_CORE0 | R | 0h | Main R5SS1 avalability Field values (others are reserved): 1'b0 - Cluster not available 1'b1 - Cluster available Reset Source: mod_por_rst_n |
| 17 | DEVICE_FEATURE0_R5FSS0_CORE1 | R | 0h | Main R5FSS0 dual/single core support Field values (others are reserved): 1'b0 - Single core 1'b1 - Dual core Reset Source: mod_por_rst_n |
| 16 | DEVICE_FEATURE0_R5FSS0_CORE0 | R | 0h | Main R5SS0 avalability Field values (others are reserved): 1'b0 - Cluster not available 1'b1 - Cluster available Reset Source: mod_por_rst_n |
| 15:0 | RESERVED | NONE | 0h | Reserved |