SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The HOST_HUB_CTRL Register is a collection of various input signals that control the xHC controllers Host or Hub interfaces. These signals are used regardless if a Host or Hub is implemented or not.
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| Instance Name | Physical Address |
|---|---|
| USB0 | 0F90 0714h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RSVD3 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RSVD3 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RSVD3 | BUS_FILTER_BYPASS | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BUS_FILTER_BYPASS | HUB_PORT_PERM_ATTACH | RSVD2 | HOST_PORT_POWER_CONTROL_PRESENT | RSVD1 | |||
| R/W | R/W | R | R/W | R | |||
| 0h | 0h | 0h | 1h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:10 | RSVD3 | R | 0h | Reserved bits Reset Source: cfg_srst_n |
| 9:6 | BUS_FILTER_BYPASS | R/W | 0h | Bus Filter Bypass bit [0]: bypass the filter for vbusvalid bit bit [2]: bypass the filter for sessvalid Reset Source: cfg_srst_n |
| 5 | HUB_PORT_PERM_ATTACH | R/W | 0h | Indicates if the device attached to a downstream port is permanently attached or not. Bit 6 is the USB2 port and bit 7 is the SS port. 0 - Not permanently attached 1 - Permanently attached Reset Source: cfg_srst_n |
| 4:2 | RSVD2 | R | 0h | Reserved bits Reset Source: cfg_srst_n |
| 1 | HOST_PORT_POWER_CONTROL_PRESENT | R/W | 1h | This port defines the bit [3] of Capability Parameters (HCCPARAMS). Change the PPC value through the pin Port Power Control (PPC). This indicates whether the host controller implementation includes port power control. 0 - Indicates that the port does not have port power switches. 1 - Indicates that the port has port power switches. Reset Source: cfg_srst_n |
| 0 | RSVD1 | R | 0h | Reserved bits Reset Source: cfg_srst_n |