SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This register is writable only when LOCK6-KICK0:1 are unlocked
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| Instance Name | Physical Address |
|---|---|
| WKUP_CTRL_MMR0 | 4301 A090h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| PMCTRL_MOSC_OSC_CG_ON_WFI_PROXY | RESERVED | ||||||
| R/W | NONE | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | PMCTRL_MOSC_SETUP_TIME_PROXY | ||||||
| NONE | R/W | ||||||
| 0h | BC00h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| PMCTRL_MOSC_SETUP_TIME_PROXY | |||||||
| R/W | |||||||
| BC00h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PMCTRL_MOSC_SETUP_TIME_PROXY | |||||||
| R/W | |||||||
| BC00h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | PMCTRL_MOSC_OSC_CG_ON_WFI_PROXY | R/W | 0h | To clock gate the main HFOSC, DM sets this bit then enters the WFI state at which time the HFOSC will be gated. Field values (others are reserved): 1'b0 - INACTIVE 1'b1 - ACTIVE Reset Source: mod_g_rst_n |
| 30:20 | RESERVED | NONE | 0h | Reserved |
| 19:0 | PMCTRL_MOSC_SETUP_TIME_PROXY | R/W | BC00h | Number of HFOSC clock cycles before HFOSC clock is ungated to the SOC (allows the HFOSC time to stabilize after starting up, before the SOC is clocked). Reset Source: mod_g_rst_n |