SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This counter is the number of formatter frames since the last synchronization packet of 128 bits, and is a 12-bit counter with a maximum count value of 4096
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0 | 0007 6000 4308h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | CYCCOUNT | ||||||
| R | R/W | ||||||
| 0h | 40h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CYCCOUNT | |||||||
| R/W | |||||||
| 40h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:12 | RESERVED | R | 0h | Reserved, returns 0 |
| 11:0 | CYCCOUNT | R/W | 40h | 12-bit counter value to indicate the number of complete frames between full sync packets. |