SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
A component identification register, that indicates that the identification registers are present. This register also indicates the component class.
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| Instance Name | Physical Address |
|---|---|
| C7X256V0_DEBUG | 0007 3400 3FF4h |
| C7X256V0_DEBUG | 0007 3400 AFF4h |
| C7X256V0_DEBUG | 0007 3400 BFF4h |
| C7X256V1_DEBUG | 0007 3800 3FF4h |
| C7X256V1_DEBUG | 0007 3800 AFF4h |
| C7X256V1_DEBUG | 0007 3800 BFF4h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CLASS | PRMBL_1 | ||||||
| R | R | ||||||
| 9h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:8 | RESERVED | NONE | 0h | Reserved |
| 7:4 | CLASS | R | 9h | Class of the component. E.g. ROM table, CoreSight component etc. Constitutes bits [15 : 12] of the component identification. |
| 3:0 | PRMBL_1 | R | 0h | Contains bits [11 : 8] of the component identification |