Product details

Integrated VCO Yes Output frequency (min) (MHz) 20 Output frequency (max) (MHz) 9800 Normalized PLL phase noise (dBc/Hz) -231 Current consumption (mA) 250 Features Integer-boundary spurs (IBS) removal, Integrated VCO, Phase adjustment, Wideband 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -126 Rating Catalog Operating temperature range (°C) -40 to 85 Lock time (µs) (typ) Loop BW dependent
Integrated VCO Yes Output frequency (min) (MHz) 20 Output frequency (max) (MHz) 9800 Normalized PLL phase noise (dBc/Hz) -231 Current consumption (mA) 250 Features Integer-boundary spurs (IBS) removal, Integrated VCO, Phase adjustment, Wideband 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -126 Rating Catalog Operating temperature range (°C) -40 to 85 Lock time (µs) (typ) Loop BW dependent
VQFN (RHA) 40 36 mm² 6 x 6
  • Output Frequency Range from 20 to 9800 MHz
  • Industry Leading Phase Noise Performance
    • VCO Phase Noise: –134.5 dBc/Hz at 1-MHz Offset for 6-GHz Output
    • Normalized PLL Noise Floor: –231 dBc/Hz
    • Normalized PLL Flicker Noise: –126 dBc/Hz
    • 49-fs RMS Jitter (12 kHz to 20 MHz) for 6 GHz Output
  • Input Clock Frequency Up to 1400 MHz
  • Phase Detector Frequency Up to 200 MHz, and Up to 400 MHz in Integer-N Mode
  • Supports Fractional-N and Integer-N Modes
  • Dual Differential Outputs
  • Innovative Solution to Reduce Spurs
  • Programmable Phase Adjustment
  • Programmable Charge Pump Current
  • Programmable Output Power Level
  • SPI or uWire (4-Wire Serial Interface)
  • Single Power Supply Operation: 3.3 V
  • Output Frequency Range from 20 to 9800 MHz
  • Industry Leading Phase Noise Performance
    • VCO Phase Noise: –134.5 dBc/Hz at 1-MHz Offset for 6-GHz Output
    • Normalized PLL Noise Floor: –231 dBc/Hz
    • Normalized PLL Flicker Noise: –126 dBc/Hz
    • 49-fs RMS Jitter (12 kHz to 20 MHz) for 6 GHz Output
  • Input Clock Frequency Up to 1400 MHz
  • Phase Detector Frequency Up to 200 MHz, and Up to 400 MHz in Integer-N Mode
  • Supports Fractional-N and Integer-N Modes
  • Dual Differential Outputs
  • Innovative Solution to Reduce Spurs
  • Programmable Phase Adjustment
  • Programmable Charge Pump Current
  • Programmable Output Power Level
  • SPI or uWire (4-Wire Serial Interface)
  • Single Power Supply Operation: 3.3 V

The LMX25 92 device is a low-noise, wideband RF PLL with integrated VCO that supports a frequency range from 20 MHz to 9.8 GHz. The device supports both fractional-N and integer-N modes, with a 32-bit fractional divider allowing fine frequency selection. Integrated noise of 49 fs for 6-GHz output makes it an ideal low-noise source. Combining best-in-class PLL and integrated VCO noise with integrated LDOs, this device removes the need for multiple discrete devices in high performance systems.

The device accepts input frequencies up to 1.4 GHz, which combined with frequency dividers and programmable low noise multiplier allows flexible frequency planning. The additional programmable low-noise multiplier lets users mitigate the impact of integer boundary spurs. In Fractional-N mode, the device can adjust the output phase by a 32-bit resolution. For applications that need fast frequency changes, the device supports a fast calibration option which takes less than 25 µs.

This performance is achieved by using single 3.3-V supply. It supports 2 flexible differential outputs that can be configured as single-ended outputs as well. Users can choose to program one output from the VCO (or doubler) and the second from the channel divider. When not being used, each output can be muted separately.

The LMX25 92 device is a low-noise, wideband RF PLL with integrated VCO that supports a frequency range from 20 MHz to 9.8 GHz. The device supports both fractional-N and integer-N modes, with a 32-bit fractional divider allowing fine frequency selection. Integrated noise of 49 fs for 6-GHz output makes it an ideal low-noise source. Combining best-in-class PLL and integrated VCO noise with integrated LDOs, this device removes the need for multiple discrete devices in high performance systems.

The device accepts input frequencies up to 1.4 GHz, which combined with frequency dividers and programmable low noise multiplier allows flexible frequency planning. The additional programmable low-noise multiplier lets users mitigate the impact of integer boundary spurs. In Fractional-N mode, the device can adjust the output phase by a 32-bit resolution. For applications that need fast frequency changes, the device supports a fast calibration option which takes less than 25 µs.

This performance is achieved by using single 3.3-V supply. It supports 2 flexible differential outputs that can be configured as single-ended outputs as well. Users can choose to program one output from the VCO (or doubler) and the second from the channel divider. When not being used, each output can be muted separately.

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Technical documentation

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Type Title Date
* Data sheet LMX2592 High Performance, Wideband PLLatinum™ RF Synthesizer With Integrated VCO datasheet (Rev. G) PDF | HTML 03 Aug 2022
More literature Clocking Optimization for RF Sampling Analog-to-Digital Converters (Rev. A) PDF | HTML 07 Apr 2021
Technical article Don’t let bad reference signals destroy the phase noise in your PLL/synthesizer 10 Jan 2017
Technical article Why phase noise matters in RF sampling converters 28 Nov 2016
Technical article A survival guide to scaling your PLL loop filter design 22 Nov 2016
Technical article Issues with jitter, phase noise, lock time or spurs? Check the loop-filter bandwidth of your PLL 06 Jun 2016
EVM User's guide LMX2592EVM User's Guide 18 Dec 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DAC12DL3200EVM — DAC12DL3200 evaluation module for 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling DAC

The DAC12DL3200 evaluation module (EVM) is a platform for evaluating the DAC12DL3200, which is a very-low-latency, dual-channel, 12-bit, RF-sampling digital-to-analog converter (DAC), capable of operating at sampling rates up to 3.2 GSPS in dual-channel mode or 6.4 GSPS in single-channel mode.

(...)

User guide: PDF | HTML
Not available on TI.com
Evaluation board

LMX2592EVM — LMX2592EVM high-performance, wideband frequency RF synthesizer PLLATINUM™ integrated circuit

The LMX2592EVM evaluation module (EVM) is for the LMX2592 device. The LMX2592 device outputs very high frequency signals with industry-leading phase noise. The integrated voltage-controlled oscillator (VCO) allows minimal discrete external components to design. The printed circuit (...)

User guide: PDF
Not available on TI.com
Evaluation board

XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules

X-MWblocks consist of RF and Microwave “Drop-In” components that can be used individually for prototyping or in production assemblies. X-MWblocks are easy to test, integrate, align, and configure to 60 GHz and beyond. No messy Sweat Soldering or Silver Epoxy processes are required. X-MWblocks are (...)

From: X-Microwave
Application software & framework

PLLATINUMSIM-SW — Texas Instruments PLLatinum Simulator Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
Application software & framework

TICSPRO-SW — Texas Instruments Clocks and Synthesizers (TICS) Pro Software

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.
Simulation model

LMX2582 IBIS Model (Rev. A)

SNAM199A.ZIP (44 KB) - IBIS Model
Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Reference designs

TIDA-00626 — 9.8GHz RF CW Signal Generator Using Integrated Synthesizer With Spur Reduction Reference Design

This design is a 9.8-GHz wideband, low-phase noise, integrated continuous wave (CW) RF signal generator with versatile spur reduction technique. The output level can be programmed from -32 dBm to 14.5 dBm in 0.5-dB steps. This signal generator can be used as local oscillator for applications, such (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-00885 — 9.8 GHz RF High Performance Synthesizer Operating From a Buck Converter Reference Design

The TIDA-00885 design utilizes the LMX2592 a low-noise, wideband RF PLL with integrated VCO that can produce an output frequency range from 20 MHz to 9.8 GHz. The LMX2592 has excellent performance, integrated phase noise of 49fs for 6GHz output making it an ideal low noise source. There are two (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-00814 — RF-Sampling S-Band Radar Receiver Reference Design

A direct RF sampling receiver approach to a radar system operating in S-band is demonstrated using the ADC32RF45, 3-Gsps, 14-bit analog to digital converter (ADC). RF sampling reduces the complexity of a system by removing down conversion and using a high sampling rate enables wider signal (...)
Design guide: PDF
Schematic: PDF
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