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Real-time motor control & automation MCUs

AM2632

現行

具有即時控制及安全性，且高達 400 MHz 的雙核心 Arm® Cortex®-R5F MCU

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AM2632

現行
產品規格表 立即訂購

產品詳細資料

CPU Arm Cortex-R5F Frequency (MHz) 400 RAM (kByte) 2048 ADC type 5 12-bit SAR Total processing (MIPS) 0.0008 Features CAN, CAN FD, EtherCAT, EtherNet/IP, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), I2C, Integrated industrial protocols, Profinet, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 4 (CAN-FD) PWM (Ch) 64 TI functional safety category Functional Safety-Compliant Number of ADC channels 30 SPI 5 Operating temperature range (°C) -40 to 105 Rating Catalog Communication interface CAN, CAN-FD, I2C, QSPI, SD/SDIO, SPI, UART Operating system BareMetal (No OS), FreeRTOS, ThreadX, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Edge AI enabled Yes Number of GPIOs 140 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning
CPU Arm Cortex-R5F Frequency (MHz) 400 RAM (kByte) 2048 ADC type 5 12-bit SAR Total processing (MIPS) 0.0008 Features CAN, CAN FD, EtherCAT, EtherNet/IP, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), I2C, Integrated industrial protocols, Profinet, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 4 (CAN-FD) PWM (Ch) 64 TI functional safety category Functional Safety-Compliant Number of ADC channels 30 SPI 5 Operating temperature range (°C) -40 to 105 Rating Catalog Communication interface CAN, CAN-FD, I2C, QSPI, SD/SDIO, SPI, UART Operating system BareMetal (No OS), FreeRTOS, ThreadX, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Edge AI enabled Yes Number of GPIOs 140 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning
NFBGA (ZCZ) 324 225 mm² 15 x 15

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • 64KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core
    • Lockstep or Dual-core capable clusters

Memory Subsystem:

  • 2MB of On-Chip RAM (OCSRAM)
    • 4 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers

Media and Data Storage:

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface
  • General-Purpose Memory Controller (GPMC)
    • 16-bit parallel data bus with 22-bit address bus
    • Up to 4MB addressable memory space
    • Integrated Error Location Module (ELM) support for error checking

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 4x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 1x Quad Serial Peripheral Interface (QSPI)
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-Processing Blocks (PPB)
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 10x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit (PRU-SS) andPRU-Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Realtime Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP
      • 1x MDIO, 1x IEP,
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated Ethernet switch supporting two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust
    • Authenticated boot
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after proper authentication
    • Ability to disable device debug functionality
  • Device ID and Key Management
    • Support for OTP Memory (FUSEROM)
      • Store root keys & other security fields
    • Separate EFUSE controllers and FUSE ROMs
    • Unique Public Device Identifiers (UIDs)
  • Memory Protection Units (MPU)
    • Dedicated Arm® MPU per Cortex®-R5F core
    • System MPU - present at various interfaces in the SoC (MPU or Firewall)
    • 8-16 programmable regions
      • Enable/Privilege ID
      • Start/End Address
      • Read/Write/Cachable
      • Secure/Non-Secure
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • DRBG with pseudo and true random number generator
    • PKA (public key accelerator) to assist in RSA/ECC processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • Built-In Self-Test (BIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3
    • Hardware integrity up to SIL-3
    • Safety-related certification
  • Functional Safety-Compliant [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Safety-related certification

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • 64KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core
    • Lockstep or Dual-core capable clusters

Memory Subsystem:

  • 2MB of On-Chip RAM (OCSRAM)
    • 4 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers

Media and Data Storage:

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface
  • General-Purpose Memory Controller (GPMC)
    • 16-bit parallel data bus with 22-bit address bus
    • Up to 4MB addressable memory space
    • Integrated Error Location Module (ELM) support for error checking

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 4x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 1x Quad Serial Peripheral Interface (QSPI)
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-Processing Blocks (PPB)
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 10x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit (PRU-SS) andPRU-Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Realtime Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP
      • 1x MDIO, 1x IEP,
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated Ethernet switch supporting two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust
    • Authenticated boot
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after proper authentication
    • Ability to disable device debug functionality
  • Device ID and Key Management
    • Support for OTP Memory (FUSEROM)
      • Store root keys & other security fields
    • Separate EFUSE controllers and FUSE ROMs
    • Unique Public Device Identifiers (UIDs)
  • Memory Protection Units (MPU)
    • Dedicated Arm® MPU per Cortex®-R5F core
    • System MPU - present at various interfaces in the SoC (MPU or Firewall)
    • 8-16 programmable regions
      • Enable/Privilege ID
      • Start/End Address
      • Read/Write/Cachable
      • Secure/Non-Secure
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • DRBG with pseudo and true random number generator
    • PKA (public key accelerator) to assist in RSA/ECC processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • Built-In Self-Test (BIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3
    • Hardware integrity up to SIL-3
    • Safety-related certification
  • Functional Safety-Compliant [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Safety-related certification

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

The AM263x Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263x MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for a multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 2MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263x devices.

TI provides a complete set of microcontroller software and development tools for the AM263x family of microcontrollers.

The AM263x Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263x MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for a multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 2MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263x devices.

TI provides a complete set of microcontroller software and development tools for the AM263x family of microcontrollers.

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引腳對引腳且具備與所比較裝置相同的功能
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重要文件 類型 標題 格式選項 日期
* Data sheet AM263x Sitara™ Microcontrollers with Real-Time Control datasheet (Rev. E) PDF | HTML 2025年 8月 12日
* Errata AM263x Sitara™ Microcontroller Silicon Revision 1.0A, 1.1A (Rev. E) PDF | HTML 2024年 5月 24日
* User guide AM263x Sitara™ Microcontroller Technical Reference Manual (Rev. I) PDF | HTML 2025年 8月 5日
* User guide AM263x Sitara Processors Technical Reference Manual Register Addendum (Rev. E) PDF | HTML 2024年 10月 14日
Application note AM26 Ethercat SubDevice with TwinCat PDF | HTML 2025年 12月 10日
Product overview AM26xx Family TIFS-SDK Product Brief PDF | HTML 2025年 5月 29日
Application note AM26x Custom PCB System Getting Started Guide (Rev. A) PDF | HTML 2025年 5月 13日
White paper AM261x 和 AM263Px 使用的工业通信协议 PDF | HTML 2025年 5月 12日
User guide AM26x Hardware Design Guidelines (Rev. D) PDF | HTML 2025年 5月 2日
User guide AM263x MCAL user guide 2025年 4月 28日
Application note How to Synchronize the Timing Between Chips With Programmable Real-Time Unit PDF | HTML 2025年 3月 10日
Functional safety information AM263x and AM263Px Software Diagnostics Library TUV SUD Functional Safety Certificate (Rev. A) 2025年 2月 25日
Application note Microcontroller Abstraction Layer on Jacinto™ and Sitara™ Embedded Processors PDF | HTML 2025年 1月 28日
Application note Enabling Trace on AM26x Devices with Lauterbach® PDF | HTML 2024年 12月 18日
Application note AM26x Family Migration Overview (Rev. A) PDF | HTML 2024年 11月 15日
Application brief Achieving Faster Secure Boot Time on AM26x Devices PDF | HTML 2024年 11月 13日
Functional safety information AM263x AUTOSAR MCAL Drivers Functional Safety Certificate 2024年 8月 20日
Application note AM263x Control Card Quick Start Guide PDF | HTML 2024年 1月 12日
Application note Clock Edge Delay Compensation With Isolated Modulators Digital Interface to MCUs (Rev. A) PDF | HTML 2024年 1月 12日
Product overview Functional Safety for AM2x and Hercules™ Microcontrollers PDF | HTML 2023年 11月 8日
EVM User's guide AM263x Sitara Control Card Hardware User's Guide (Rev. D) PDF | HTML 2023年 9月 14日
Application note Sitara MCU Thermal Design PDF | HTML 2023年 9月 11日
Application note Using the Sitara MCU AM263x in an Automotive SiC Traction Inverter PDF | HTML 2023年 8月 16日
Application note Integration of MbedTLS on SITARA MCU Devices PDF | HTML 2023年 8月 3日
Functional safety information AM263x IEC 61508 Certificate Report 2023年 7月 31日
Functional safety information AM263x ISO26262 Certificate Report 2023年 7月 31日
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 2023年 7月 31日
Functional safety information AM263x IEC61508 TUV SUD Safety Certificate 2023年 7月 26日
User guide 10-kW, Three-Phase, Three-Level (T-Type) Inverter Using AM263 PDF | HTML 2023年 7月 11日
Application note AM263x Device Nomenclature and Subset Devices PDF | HTML 2023年 7月 3日
Certificate BP-AM2BLDCSERVO EU Declaration of Conformity (DoC) 2023年 6月 28日
Application note Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 2023年 5月 24日
Application note AM263x QSPI Flash Selection Guide (Rev. A) PDF | HTML 2023年 3月 23日
Application note Monitoring Bus Voltage and Power Measurement on AM263x MCU Using INA226 PDF | HTML 2023年 3月 2日
Application note Interfacing 5V Sensors and Signals to 3.3V Input SAR ADCs PDF | HTML 2023年 2月 9日
Application note DCC Computation Tool PDF | HTML 2023年 2月 3日
Application note Debugging Sitara AM2x Microcontrollers PDF | HTML 2022年 10月 24日
Application note AM263x Power Estimation Tool PDF | HTML 2022年 10月 20日
Application note AM263x SW Build Sheet 2022年 10月 17日
Application note PRU-ICSS Feature Comparison (Rev. G) PDF | HTML 2022年 10月 11日
White paper 具備最佳性能的 EV 牽引逆變器設計優先順序 PDF | HTML 2022年 9月 27日
White paper 牽引逆變器 – 車輛電氣化背後的驅動力量 PDF | HTML 2022年 8月 17日
Application note Optimized Trigonometric Functions on TI Arm Cores (Rev. A) PDF | HTML 2022年 8月 8日
Application note AM263x Benchmarks PDF | HTML 2022年 5月 9日
Technical article What is “real-time control” and why do you need it? PDF | HTML 2022年 4月 6日
Application note AM263x for Traction Inverters PDF | HTML 2022年 3月 21日
Technical article How MCUs can unlock the full potential of electrification designs PDF | HTML 2022年 3月 21日

設計與開發

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開發板

BP-AM2BLDCSERVO — AM2x Brushless-DC (BLDC) Servo Motor BoosterPack

The AM2x BLDC Servo Motor BoosterPack plug-in module is an add-on for the AM2x LaunchPad development kits. This BoosterPack provides up to two axes of 24V/8A BLDC driver, ADC/SDFM current feedback, industrial absolute encoder, and resolver feedback. 

使用指南: PDF | HTML
TI.com 無法提供
開發板

LP-AM263 — AM263x Arm® 架構 MCU 通用型 LaunchPad™ 開發套件

LP-AM263 是一款針對 AM263x 系列 Arm® 架構應用型 MCU 打造的高效能開發板。此電路板極適用於初始評估與原型，因為它提供標準化且使用方便的平台，可用於開發您的下一個應用程式。

 

LP-AM263 配備 AM2634 MCU (採用 Arm® 架構) 及其他元件，讓使用者可透過多種裝置介面 (包括工業乙太網路 (IE)、標準乙太網路、快速序列介面 (FSI) 等) 輕鬆打造原型。AM2634 支援各種 IE 協定如 EtherCAT、EtherNet/IP 和 PROFINET®。

 

這款延伸 LaunchPad™ XL 開發套件提供額外的 I/O (...)

使用指南: PDF | HTML
TI.com 無法提供
開發板

TMDSCNCD263 — AM263x 通用 controlCARD™ 開發套件 Arm® 架構 MCU

TMDSCNCD263 是適用於 AM263x 系列 Sitara™ 高性能微控制器的 HSEC180 controlCARD 型評估和開發工具。此電路板極適用於初始評估與原型，因為它提供標準化且使用方便的平台，可用於開發您的下一個應用程式。AM263 控制卡配備了 Sitara AM2634 處理器及其他零組件，可讓使用者使用各種裝置介面，其中包括工業乙太網路、標準乙太網路、快速序列介面 (FSI) 及其他功能，以輕鬆開發和測試應用程式。AM2634 支援 EtherCAT、EtherNet/IP 和 PROFINET 等各種工業乙太網路通訊協定。

TMDSCNCD263 可單獨使用，或與 (...)

使用指南: PDF | HTML
TI.com 無法提供
開發板

TMDSHSECDOCK-AM263 — 適用於 GPMC、JTAG/TRACE、MCAN 和 LIN 訊號的 AM263x-CC HSEC 底座和斷路板。

此評估模組是用於 TMDSCNCD263 (AM263x controlCARD) 和 TMDSCNCD263P (AM263Px controlCARD) 的高速邊緣卡 (HSEC) 擴充塢，用於擴充關鍵 I/O 和硬體周邊設備。此電路板向處於評估和開發階段的客戶展示了 AM263x 和 AM263Px 上的 MCU+ SDK 的功能。除了 TMDSHSECDOCK 的功能外，此電路板還支援其他 AM263x 和 AM263Px 系列功能，例如 CAN/LIN、GPMC (僅限 AM263x)、TRACE 和 JTAG。TMDSHSECDOCK-AM263 包括一個板載 64Mb (...)
使用指南: PDF | HTML
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子卡

TMDSHSECDOCK — HSEC180 controlCARD 基板擴充站

TMDSHSECDOCK 為一塊基板，可為相容的 HSEC180 架構 controlCARD 提供關鍵訊號的接頭針腳存取。提供模擬板區域以快速進行原型設計。電路板電源可由 USB 纜線或 5-V 桶式電源供應器供電。

使用指南: PDF | HTML
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偵錯探測器

TMDSEMU110-U — XDS110 JTAG 偵錯探測器

德州儀器 XDS110 是一種全新的偵錯探測器 (模擬器) 類別，適用於 TI 嵌入式處理器。XDS110 取代 XDS100 系列，可在單一 Pod 中支援更廣泛的標準 (IEEE1149.1、IEEE1149.7、SWD)。同時，所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。  對於針腳上的核心追蹤，則需要 XDS560v2 PRO TRACE。

德州儀器 XDS110 透過 TI 20 針腳連接器（具有用於 TI 14 針腳和 Arm 10 針腳和 Arm 20 針腳的多轉接器）連接到目標電路板，並透過 USB2.0 (...)

使用指南: PDF
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偵錯探測器

TMDSEMU560V2STM-U — XDS560v2 System Trace USB 偵錯探測器

XDS560v2 是 XDS560™ 偵錯探測器系列的最高性能表現，支援傳統 JTAG 標準 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。請注意，序列線偵錯 (SWD) 不受支援。

所有 XDS 偵錯探測器均支援所有具有嵌入式追踪緩衝區 (ETB) 的 ARM 和 DSP 處理器中的核心和系統追蹤功能。對於針腳追蹤則需要 XDS560v2 PRO TRACE。

XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板，並透過 USB2.0 高速 (480Mbps) (...)

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偵錯探測器

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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偵錯探測器

LB-3P-TRACE32-ARM — 適用於 Arm® 架構微控制器和處理器的 Lauterbach TRACE32® 偵錯和追蹤系統

Lauterbach 的 TRACE32® 工具是一套先進的軟硬體元件，可讓開發人員分析、最佳化及認證各種 Arm® 架構微控制器和處理器。全球知名的嵌入式系統和 SoC 偵錯和追蹤解決方案是完美的解決方案，適用於從早期的矽前 (pre-silicon) 開發，到產品認證和現場故障排除等所有開發階段。Lauterbach 工具的直覺模組化設計為工程師提供現今最高的可用性能，以及可隨需求變化而調整和成長的系統。藉由 TRACE32® 偵錯器，開發人員也可透過單一偵錯介面，同時偵錯和控制 SoC 中的任何 C28x/C29x/C6x/C7x DSP 核心及所有其他 Arm (...)

從：Lauterbach GmbH
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偵錯探測器

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

從：TASKING Germany GmbH
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Third-party accessory

VCTR-3P-VX1000 — VX1000 量測與校準介面硬體

VX1000 硬體能讓 CANape 等量測與校準工具以高效能且對執行階段影響極小的方式存取 ECU。此硬體專為車用設計，但亦可應用於測試平台與實驗室環境。憑藉其高度擴展性與廣泛的產品組合，VX1000 硬體能為各種應用場景提供合適的解決方案。
該系統由兩大主要元件組成：基礎模組與插接裝置。VX1000 系列支援多種控制器，包括 Sitara 系列（AM263、AM263P、AM275）、Jacinto 系列 (TDA4)、AWR1843、AWR2944、MSPM0x 及 TM4C129。JTAG、SWD、Aurora 與 Nexus-Aux 是 VX1000 可直接支援的主流控制器介面。

從：Vector Informatik GmbH
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軟體開發套件 (SDK)

AM263X-MCAL-SDK — Microcontroller Abstraction Layer (MCAL) and Complex Device Drivers (CDD) for AM263X

The AM263x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. These softwares accelerate application (...)

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軟體開發套件 (SDK)

AM263X-RESTRICTED-SECURITY — AM263x restricted security content

The AM263x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. These softwares accelerate application (...)

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要求
軟體開發套件 (SDK)

DIGITAL-POWER-SDK-AM263X — Digital Power SDK for AM263X

The AM263x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. These softwares accelerate application (...)

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軟體開發套件 (SDK)

GHS-3P-AM26-UVEL-RTOS-SDK — 適用於 AM263X 的 Green Hills 軟體 µ-velOSity 安全 RTOS SDK

適用 AM263x 系列的 u-velOSity 安全 RTOS SDK 能讓軟體開發人員在 AM263x 處理器的汽車和工業系統中，有效率地開發並放心部署關鍵系統。此 SDK 支援 TI SysConfig、TI 裝置移植層 (DPL) 和 Code Composer。


• µ-velOSity RTOS 為微型記憶體體積，開機時間短，並通過汽車 ISO 26262 ASIL D、工業 IEC 61508 SIL 3 與鐵路 EN 50128 / EN 50657 SIL 4 認證。


• MULTI IDE 擁有多核心偵錯器、系統檢視器、剖析器和 MISRA Adherence (...)

從：Green Hills Software
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軟體開發套件 (SDK)

INDUSTRIAL-COMMUNICATIONS-SDK-AM263X — Industrial Communications SDK for AM263x

This software development kit (SDK) includes real-time industrial communication protocols (EtherCAT, EtherNet/IP, PROFINET, IO-Link, etc.) on TI processors. It also has PRU-ICSS firmware, drivers, communication stack libraries, and application examples, along with documentation.

What's new:

  • (...)
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軟體開發套件 (SDK)

MCU-PLUS-SDK-AM263X — MCU+ SDK for AM263x - RTOS, No-RTOS

The AM263x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. These softwares accelerate application (...)

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軟體開發套件 (SDK)

MOTOR-CONTROL-SDK-AM263X — Motor Control SDK for AM263x

The AM263x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. These softwares accelerate application (...)

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韌體

USIT-3P-SECIC-HSM — Uni-Sentry SecIC-HSM 韌體

SecIC-HSM 旨在滿足 MCU/SoC 晶片所需的網路安全要求。HSM 韌體可應用於汽車、新能源、光伏、機器人、醫療保健與航空等領域。提供的網路安全功能包括安全開機、安全通訊 (SecOC)、安全診斷、安全儲存、安全更新、安全偵錯和金鑰管理。SecIC-HSM 的優點：一站式網路安全解決方案，具備跨晶片系列的全方位軟體相容性，擁有業界領先的性能，已在近 30 家 OEM 的量產車型中成功部署，累計出貨超過 300 萬套。
從：Shanghai Uni-Sentry Intelligent Technology Co., LTD
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韌體

USIT-3P-SECIC-PQC — Uni-Sentry SecIC-PQC 演算法韌體

Uni-Sentry 的安全解決方案採用 PQC 演算法，能夠抵抗量子電腦對傳統加密演算法所造成的解密威脅。PQC 韌體與硬體安全模組 (HSM) 進行協同優化，利用硬體加速與安全性強化，以提升加密演算法的執行效率與安全性。 


Uni-Sentry 持續監控全球量子運算的發展，並更新其演算法組合。當前的 PQC 產品功能包括：

  • SP 800-208：LMS 和 XMSS
  • FIPS 203 (ML-KEM)：CRYSTALS-KYBER
  • FIPS 204 (ML-DSA)：CRYSTALS-Dilithium
  • FIPS 205 (SLH-DSA)： SPHINCS+ 

技術亮點 

  • 量子抗性認證：與 (...)
從：Shanghai Uni-Sentry Intelligent Technology Co., LTD
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快速入門

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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IDE、配置、編譯器或偵錯程式

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

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IDE、配置、編譯器或偵錯程式

SYSCONFIG — Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

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線上培訓

AM26X-ACADEMY — AM26x Academy

AM26x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
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作業系統 (OS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
從：Green Hills Software
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作業系統 (OS)

WHIS-3P-SAFERTOS — WITTENSTEIN SAFERTOS 預先認證的安全 RTOS

SAFERTOS® 是專為嵌入式處理器設計的獨特即時作業系統。經 TÜV SÜD 預先認證，符合 IEC 61508 SIL3 與 ISO 26262 ASILD 標準。SAFERTOS® 是由 WHIS 專家團隊專為安全而打造，適用於全球重要安全應用。WHIS 與德州儀器的合作已經超過十年。在此期間，WHIS 已將 SAFERTOS® 移植至各種 TI 處理器，支援所有熱門核心，並可依要求提供其他架構。SAFERTOS® 專為您的特定處理器/編譯器組合量身打造，隨附完整的原始程式碼與設計保證包，可完全一目了然整個設計生命週期。許多 WHIS 客戶開始使用 FreeRTOS (...)
從：WITTENSTEIN High Integrity Systems
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軟體程式設計工具

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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支援軟體

MATHW-3P-AM26X-EC — 德州儀器 AM26x MCU 嵌入式編碼器支援封裝

TI 為各種 AM26x 裝置和評估電路板提供基於模型設計的工作流程。

適用於 AM26x controlCARD 和 LaunchPad 電路板的 Embedded Coder® 支援套件可讓您使用 Simulink® 模型，在 AM26x 裝置上自動创建、載入及运行演算法。  模型在 Simulink 中設計，使用 Embedded Coder 產生程式碼，並在專為即時控制應用設計的 AM263x、AM263Px、AM261x 硬體平台上運行可執行文件，無需使用手動編程。運用業界實證的基於模型設計技術，驗證演算法在模擬期間是否能正常運作，然後使用自動產生程式碼，在 AM26X (...)
從：MathWorks, Inc.
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模擬型號

AM263x Sitara™ BSDL Model

SPRM772.ZIP (4 KB) - BSDL Model
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模擬型號

AM263x Sitara™ IBIS Model

SPRM771.ZIP (2062 KB) - IBIS Model
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模擬型號

AM263x Sitara™ Processors Thermal Model

SPRM769.ZIP (6 KB) - Thermal Model
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設計工具

SPRR464 — AM263x Power Estimation Tool Spreadsheet

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NFBGA (ZCZ) 324 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

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