SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The remote cache data storage memory stores the cache data managed by the RL2 module. This storage holds a number of 64 byte blocks as specified by the rem*_len registers. The remote cache data storage memory stores the 8 WAYs consecutively for each SET address. In Dual Mode each WAY has two 32 byte cache lines (64 bytes) versus other l2_ctrl.size values which only hold a single 32 byte cache line WAY. In dual Mode the WAY has a high and low sub cache line, the high is stored at the higher address and the low is stored at the WAY base.
| WAY N... WAY 0 - SET 0 |
| WAY N... WAY 0 - SET 1 |
| ... |
| WAY N... WAY 0 - SET (M-1) |
| WAY N... WAY 0 - SET M |