SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Start Address of LINK/TRAN settings is pointed by Pointer for UHS-II Capabilities Register.
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| Instance Name | Physical Address |
|---|---|
| MMCSD0 | 0FA0 0118h |
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | |
| RESERVED | |||||||
| NONE | |||||||
| 989680h | |||||||
| 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 |
| RESERVED | |||||||
| NONE | |||||||
| 989680h | |||||||
| 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 |
| RESERVED | |||||||
| NONE | |||||||
| 989680h | |||||||
| 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 |
| N_DATA_GAP | |||||||
| R | |||||||
| 81h | |||||||
| 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
| N_FCU | |||||||
| R | |||||||
| 1h | |||||||
| 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 63:40 | RESERVED | NONE | 989680h | Reserved |
| 39:32 | N_DATA_GAP | R | 81h | This field indicates the minimum number of data gap[DIDL] supported by the Host Controller.
00h - No Gap
01h - 1 LSS
02h - 2 LSS
03h - 3 LSS
......
......
FFh - 255 LSS
255 3 2 1 0 |
| 31:20 | MAX_BLK_LENGTH | R | 200h | This field indicates maximum block length by the Host Controller. 000h - Not Used 001h - 1 byte 002h - 2 bytes ...... ...... 200h - 512 bytes ...... ...... 800h - 2048 bytes 801h-FFFh -Not Used Reset Source: vbus_amod_g_rst_n |
| 19:16 | RESERVED | NONE | 0h | Reserved |
| 15:8 | N_FCU | R | 1h |
This field indicates maximum the number of blocks in a Flow Control unit by the Host Controller.This value is determined by supported buffer size.
00h - 256 Blocks
01h - 1 Block
02h - 2 Block
03h - 3 Block
.......
FFh - 255 Blocks
255 3 2 1 0 |
| 7:0 | RESERVED | NONE | 0h | Reserved |