SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This is the configuration for Output Clock zone 2
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| Instance Name | Physical Address |
|---|---|
| AASRC0 | 02D0 0344h |
| AASRC1 | 02D4 0344h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | OVERRIDE_SETTLE_VALUE | OVERRIDE_SETTLE | LOOP_SETUP | ||||
| R | R/W | R/W | R/W | ||||
| 0h | 0h | 0h | 0h | ||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| LOOP_SETUP | SETTLE | ||||||
| R/W | R | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| LOOP_STATE | OUTPUT_CLOCK_ZONE_CLOCK_SOURCE_SELECT | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:19 | RESERVED | R | 0h | Always read as 0 |
| 18 | OVERRIDE_SETTLE_VALUE | R/W | 0h | Value written to this field will be used as settle if override settle signal is set |
| 17 | OVERRIDE_SETTLE | R/W | 0h | This signal override the settle of output clock zone 2 clock recovery loop 0 Settle from clock recovery will be used
1 Value written to override settle value will
be used |
| 16:9 | LOOP_SETUP | R/W | 0h | This is the setting for input clock recovery loop for zone 2 8h00: Slow loop 8h40: Medium1 loop 8h80: Medium2 loop 8hC0: Slow loop |
| 8 | SETTLE | R | 0h | This signals sets to 1 when clock recovery loop is settled |
| 7:4 | LOOP_STATE | R | 0h | Loop debug state |
| 3:0 | OUTPUT_CLOCK_ZONE_CLOCK_SOURCE_SELECT | R/W | 0h | This selects the 8x1 and 2x1 mux structure for output clock zone 2 1xxx: Clock comes from output clock gen 0 0000-0111: Selects txsync signal from 0-7 |