SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
A total of 17 destination channels are provided within the DMA for concurrent transfers from Tx per channel buffers to the various attached peripherals. Each Tx channel requires a single PSI-L thread. The Tx channels are allocated as in the following table.
| Tx DMA Channel | Function | Channel Type | Trigger Mode | Data FIFO Address | Strobe MMR Address | Control FIFO Address |
|---|---|---|---|---|---|---|
| 8000 | SPI 3 Tx Ch 0 | XY | edge | 000020130138 | 000000000000 | 000000000000 |
| 8001 | SPI 3 Tx Ch 1 | XY | edge | 00002013014C | 000000000000 | 000000000000 |
| 8002 | SPI 3 Tx Ch 2 | XY | edge | 000020130160 | 000000000000 | 000000000000 |
| 8003 | SPI 3 Tx Ch 3 | XY | edge | 000020130174 | 000000000000 | 000000000000 |
| 8004 | SPI 4 Tx Ch 0 | XY | edge | 000020140138 | 000000000000 | 000000000000 |
| 8005 | SPI 4 Tx Ch 1 | XY | edge | 00002014014C | 000000000000 | 000000000000 |
| 8006 | SPI 4 Tx Ch 2 | XY | edge | 000020140160 | 000000000000 | 000000000000 |
| 8007 | SPI 4 Tx Ch 3 | XY | edge | 000020140174 | 000000000000 | 000000000000 |
| 8008 | MCAN 2 Tx Ch 0 | MCAN | pulse | 000020728000 | 0000207210D0 | 000000000000 |
| 8009 | MCAN 2 Tx Ch 1 | MCAN | pulse | 000020728048 | 0000207210D0 | 000000000000 |
| 800a | MCAN 2 Tx Ch 2 | MCAN | pulse | 000020728090 | 0000207210D0 | 000000000000 |
| 800b | MCAN 3 Tx Ch 0 | MCAN | pulse | 000020738000 | 0000207310D0 | 000000000000 |
| 800c | MCAN 3 Tx Ch 1 | MCAN | pulse | 000020738048 | 0000207310D0 | 000000000000 |
| 800d | MCAN 3 Tx Ch 2 | MCAN | pulse | 000002708090 | 0000207310D0 | 000000000000 |
| 800e | MCAN 4 Tx Ch 0 | MCAN | pulse | 000020748000 | 0000207410D0 | 000000000000 |
| 800f | MCAN 4 Tx Ch 1 | MCAN | pulse | 000020748048 | 0000207410D0 | 000000000000 |
| 8010 | MCAN 4 Tx Ch 2 | MCAN | pulse | 000020748090 | 0000207410D0 | 000000000000 |