SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Selects the timebase clock source for the Global Timebase Counter
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| Instance Name | Physical Address |
|---|---|
| WKUP_CTRL_MMR0 | 4300 A030h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | WKUP_GTC_CLKSEL_CLK_SEL_PROXY | ||||||
| NONE | R/W | ||||||
| 0h | 1h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:3 | RESERVED | NONE | 0h | Reserved |
| 2:0 | WKUP_GTC_CLKSEL_CLK_SEL_PROXY | R/W | 1h | Selects the GTC timebase clock source Field values (others are reserved): 3'b000 - MAIN_PLL2_HSDIV5_CLKOUT 3'b001 - MAIN_PLL0_HSDIV6_CLKOUT 3'b010 - CP_GEMAC_CPTS0_RFT_CLK (Pin) 3'b011 - Reserved '0' 3'b100 - MCU_EXT_REFCLK0 (Pin) 3'b101 - EXT_REFCLK1 (Pin) 3'b110 - MCU_SYSCLK0_DIV2 3'b110 - MCU_SYSCLK0/2 3'b111 - MAIN_SYSCLK0 Reset Source: mod_g_rst_n |