SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Timer10 functional clock selection control
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| Instance Name | Physical Address |
|---|---|
| MAIN_CTRL_MMR0 | 0010 81D8h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | TIMER10_CLKSEL_CLK_SEL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:4 | RESERVED | NONE | 0h | Reserved |
| 3:0 | TIMER10_CLKSEL_CLK_SEL | R/W | 0h | Timer functional clock input select control. Field values (others are reserved): 4'b0000 - HFOSC0_CLKOUT 4'b0001 - DEVICE_CLKOUT_32K 4'b0010 - MAIN_PLL0_HSDIV7_CLKOUT 4'b0011 - CLK_12M_RC 4'b0100 - MCU_EXT_REFCLK0 (Pin) 4'b0101 - EXT_REFCLK1 (Pin) 4'b0110 - Reserved 4'b0111 - CP_GEMAC_CPTS0_RFT_CLK (Pin) 4'b1000 - MAIN_PLL1_HSDIV3_CLKOUT 4'b1001 - MAIN_PLL2_HSDIV6_CLKOUT 4'b1010 - CPSW0_CPTS_GENF0 4'b1011 - CPSW0_CPTS_GENF1 4'b1100 - Reserved Reset Source: sys_por_rst_n |