SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
A total of 2 source channels are provided within the DMA for concurrent transfers from the various attached peripherals into the Rx per channel buffers and on to the PSI-L Rx Interface. Each Rx channel requires a single PSI-L thread. The Rx channels are allocated as follows.
| Rx DMA Channel | Function | Channel Type | Trigger Type | Data FIFO Address | Strobe MMR Address | Control FIFO Address |
|---|---|---|---|---|---|---|
| 0 | ADC0 Rx Ch 0 | XY | edge | 000020608100 | 000000000000 | 000000000000 |
| 1 | ADC1 Rx Ch 0 | XY | edge | 000020608200 | 000000000000 | 000000000000 |