SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
register UTMI_REG0
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| Instance Name | Physical Address |
|---|---|
| USB0 | 0F90 8280h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| LOOPBACK_SEL | LOOPBACK_EN | BIST_MODE_SEL | BIST_EN | ||||
| R/W | R/W | R/W | R/W | ||||
| 0h | 0h | 0h | 0h | ||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:8 | RESERVED | NONE | 0h | Reserved |
| 7:6 | LOOPBACK_SEL | R/W | 0h | 00 Loopback mode selection = 00 : Reserved, 01 Loopback mode selection = 01 : LS, 10 Loopback mode selection = 10 : FS, 11 Loopback mode selection = 11 : HS Reset Source: usb2_sync_preset_n |
| 5 | LOOPBACK_EN | R/W | 0h | 0 Loopback mode selection is taken from primary input port-loopback[1:0], 1 Loopback mode selection is taken from UTMI_REG0[7:6]. Reset Source: usb2_sync_preset_n |
| 4:1 | BIST_MODE_SEL | R/W | 0h | 0 BIST for 8 bit, 1 BIST for 16 bit, 0 Error injection disabled, 1 Error injection enabled, 0 BIST for device mode, 1 BIST for host mode, 0 BIST for HS mode, 1 BIST for FS mode. Reset Source: usb2_sync_preset_n |
| 0 | BIST_EN | R/W | 0h | 0 BIST control signals taken from primary input BIST related ports, 1 BIST signals taken from UTMI REG0[4:1], UTMI_REG1[7:6], UTMI_REG5[7:6] Reset Source: usb2_sync_preset_n |