SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Global General Purpose Input/Output Register The application can use this register for general purpose input and output ports or for debugging.
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| Instance Name | Physical Address |
|---|---|
| USB0 | 3100 C124h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| GPO | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| GPO | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| GPI | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| GPI | |||||||
| R | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | GPO | R/W | 0h | General Purpose Output The value of this field is driven out on the gp_out[15:0] output port. Reset Source: rst_mod_g_rst_n |
| 15:0 | GPI | R | 0h | General Purpose Input The read value of this field reflects the gp_in[15:0] input signal value. Note: Register bit-bash test should not check for reset value of this field since its not predictable. depends on the gp_in port. Reset Source: rst_mod_g_rst_n |