SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Seed value for the counter attached to clock source 0
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| Instance Name | Physical Address |
|---|---|
| DCC0 | 0080 0008h |
| DCC1 | 0080 4008h |
| DCC2 | 0080 8008h |
| DCC3 | 0080 C008h |
| DCC4 | 0081 0008h |
| DCC5 | 0081 4008h |
| DCC6 | 0081 8008h |
| DCC7 | 0081 C008h |
| DCC8 | 0082 0008h |
| MCU_DCC0 | 04C0 0008h |
| MCU_DCC1 | 04C1 0008h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | COUNTSEED0 | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| COUNTSEED0 | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| COUNTSEED0 | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:20 | RESERVED | NONE | 0h | Reserved |
| 19:0 | COUNTSEED0 | R/W | 0h | This field contains the seed value that gets loaded into counter 0 (clock source 0). User, privilege, and debug mode (read): Returns the current seed value for counter 0. Privilege and debug mode (write): Sets the current seed value for counter 0. NOTE - Operating the DCC with 0 in the COUNTSEED0 register will result in undefined operation. NOTE: Operating the DCC with 0 in the COUNTSEED0 register will result in undefined operation. |