SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Controls drive strength of MMC0 SDIO mode pins
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| Instance Name | Physical Address |
|---|---|
| WKUP_CTRL_MMR0 | 4300 41B4h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | SDIO0_CTRL_DRV_STR | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:5 | RESERVED | NONE | 0h | Reserved |
| 4:0 | SDIO0_CTRL_DRV_STR | R/W | 0h | Selects the SDIO pin drive strength. The default value trims the buffers for ~40 ohms. For options other than the Reset/Default 40 ohm, the register value should be modified as follows: 40 ohms - Default Value 33 ohms - Default Value + 5 50 ohms - Default Value -5 66 ohms - Default Value -10 Note: Values other than the reset value may invalidate the datasheet timing parameters and therefore should not be used. Reset Source: mod_por_rst_n |