SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
ROM Mask Register
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| Instance Name | Physical Address |
|---|---|
| PBIST0 | 0039 01C0h |
| PBIST1 | 003A 01C0h |
| PBIST2 | 003B 01C0h |
| PBIST3 | 003C 01C0h |
| PBIST4 | 003D 01C0h |
| PBIST5 | 003E 01C0h |
| PBIST6 | 003F 01C0h |
| PBIST7 | 0034 01C0h |
| PBIST8 | 0035 01C0h |
| WKUP_PBIST0 | 2B50 01C0h |
| WKUP_PBIST1 | 2B50 11C0h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | ROM | ||||||
| NONE | R/W | ||||||
| 0h | 3h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:2 | RESERVED | NONE | 0h | Reserved |
| 1:0 | ROM | R/W | 3h | ROM Mask (ROM) Reset Source: mod_g_rst_n |